ACTEL CORPORATION
Patent Owner
Stats
- 511 total patents issued
- 187 Total Apps Published
- May 02, 2013 most recent publication
Details
- 511 Issued Patents
- 53 Issued in last 3 years
- 26 Published in last 3 years
- 12,734 Total Citation Count
- May 09, 1986 Earliest Filing
- 81 Expired/Abandoned/Withdrawn Patents
Technologies
Intl Class
Technology
# of Patents
Rank
Top Patents (by citation)
Patent #
Title
Filing Date
Issue Date
Intl Class
Cited #
5,821,776 Field programmable gate array with mask programmed analog function circuitsJan 31, 97Oct 13, 98[H03K]135
6,211,697 Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structureMay 25, 99Apr 03, 01[H03K]133
5,457,644 Field programmable digital signal processing array integrated circuitAug 20, 93Oct 10, 95[G06F, G06G]122
6,838,902 Synchronous first-in/first-out block memory for a field programmable gate arrayMay 28, 03Jan 04, 05[H03K]119
7,129,746 System-on-a-chip integrated circuit including dual-function analog and digital inputsJun 25, 04Oct 31, 06[H03K]110
5,744,980 Flexible, high-performance static RAM architecture for field-programmable gate arraysFeb 16, 96Apr 28, 98[H03K]107
5,198,705 Logic module with configurable combinational and sequential blocksOct 07, 91Mar 30, 93[H03K]100
Recent Publications
Publication #
Title
Filing Date
Pub Date
Intl Class
2012/0221,832 APPARATUS AND METHODS FOR IN-APPLICATION PROGRAMMING OF FLASH-BASED PROGRAMABLE LOGIC DEVICESFeb 28, 11Aug 30, 12[G06F]
2011/0147,821 NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUTMar 01, 11Jun 23, 11[H01L]
2011/0018,070 NON-VOLATILE PROGRAMMABLE MEMORY CELL AND ARRAY FOR PROGRAMMABLE LOGIC ARRAYSep 30, 10Jan 27, 11[H01L]
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
8,289,047 Architecture and interconnect scheme for programmable logic circuitsNov 10, 10Oct 16, 12[H03K]
8,258,567 Non-volatile two-transistor programmable logic cell and array layoutMar 01, 11Sep 04, 12[H01L]
8,255,854 Architecture and method for compensating for disparate signal rise and fall times by using polarity selection to improve timing and power in an integrated circuitApr 02, 10Aug 28, 12[G06F]
8,191,021 Single event transient mitigation and measurement in integrated circuitsJan 29, 09May 29, 12[G06F, H03K]
Top Inventors for This Owner
Inventor Name
Address
# of Patent/Pub
