ACTEL CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H03K PULSE TECHNIQUE 15632
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 99220
 
 
 
G11C STATIC STORES 6183
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 59340
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 16127
 
 
 
H01H ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES 978
 
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 599
 
 
 
G06G ANALOGUE COMPUTERS 248
 
 
 
H02H EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS 275
 
 
 
H03D DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER 247

Top Patents (by citation)

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Recent Publications

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8,446,170 FPGA RAM blocks optimized for use as register filesMay 03, 12May 21, 13[H03K]
8,415,650 Front to back resistive random access memory cellsJul 01, 10Apr 09, 13[H01L]
8,320,178 Push-pull programmable logic device cellJul 01, 10Nov 27, 12[G11C]
8,289,047 Architecture and interconnect scheme for programmable logic circuitsNov 10, 10Oct 16, 12[H03K]
8,269,203 Resistive RAM devices for programmable logic devicesJul 01, 10Sep 18, 12[H01L]
8,269,204 Back to back resistive random access memory cellsJul 01, 10Sep 18, 12[H01L]
8,258,567 Non-volatile two-transistor programmable logic cell and array layoutMar 01, 11Sep 04, 12[H01L]
8,258,811 Enhanced field programmable gate arrayJun 10, 11Sep 04, 12[H03K]
8,255,854 Architecture and method for compensating for disparate signal rise and fall times by using polarity selection to improve timing and power in an integrated circuitApr 02, 10Aug 28, 12[G06F]
8,191,021 Single event transient mitigation and measurement in integrated circuitsJan 29, 09May 29, 12[G06F, H03K]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
7,915,918 Method and apparatus for universal program controlled bus architectureExpiredOct 29, 10Mar 29, 11[H03K]
2011/0024,821 PUSH-PULL FPGA CELLABANOct 13, 10Feb 03, 11[H01L]
7,830,173 Method and apparatus for universal program controlled bus architectureExpiredMar 10, 09Nov 09, 10[H03K]
2009/0058,462 FIELD PROGRAMMABLE GATE ARRAY INCLUDING A NONVOLATILE USER MEMORY AND METHOD FOR PROGRAMMINGABANNov 05, 08Mar 05, 09[H03K]
2009/0057,821 REPROGRAMMABLE METAL-TO-METAL ANTIFUSE EMPLOYING CARBON-CONTAINING ANTIFUSE MATERIALABANOct 27, 08Mar 05, 09[H01L]
2009/0051,050 CORNER I/O PAD DENSITYABANAug 24, 07Feb 26, 09[H01L]
2008/0309,371 FACE-TO-FACE BONDED I/O CIRCUIT DIE AND FUNCTIONAL LOGIC CIRCUIT DIE SYSTEMABANAug 22, 08Dec 18, 08[H03K]
2008/0297,191 APPARATUS AND METHOD OF ERROR DETECTION AND CORRECTION IN A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY FIELD-PROGRAMMABLE GATE ARRAYABANJul 23, 08Dec 04, 08[H03K]
2008/0284,532 VOLTAGE- AND TEMPERATURE-COMPENSATED RC OSCILLATOR CIRCUITABANJul 30, 08Nov 20, 08[H03K, H03L]
2008/0279,028 FLASH/DYNAMIC RANDOM ACCESS MEMORY FIELD PROGRAMMABLE GATE ARRAYABANJul 29, 08Nov 13, 08[G11C]
2008/0272,804 NON-VOLATILE MEMORY CONFIGURATION SCHEME FOR VOLATILE-MEMORY-BASED PROGRAMMABLE CIRCUITS IN AN FPGAABANJul 21, 08Nov 06, 08[H03K]
2008/0276,030 SRAM BUS ARCHITECTURE AND INTERCONNECT TO AN FPGAABANJul 23, 08Nov 06, 08[G06F]
2008/0238,477 TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTUREABANFeb 25, 08Oct 02, 08[H03K]
2008/0231,319 DEDICATED INPUT/OUTPUT FIRST IN/FIRST OUT MODULE FOR A FIELD PROGRAMMABLE GATE ARRAYABANJun 02, 08Sep 25, 08[H03K]
2008/0218,206 FIELD PROGRAMMABLE GATE ARRAY LONG LINE ROUTING NETWORKABANMay 27, 08Sep 11, 08[H04B, H03K]
2008/0218,207 SYNCHRONOUS FIRST-IN/FIRST-OUT BLOCK MEMORY FOR A FIELD PROGRAMMABLE GATE ARRAYABANApr 29, 08Sep 11, 08[H03K]
2008/0197,450 AMORPHOUS CARBON METAL-TO-METAL ANTIFUSE WITH ADHESION PROMOTING LAYERSABANApr 15, 08Aug 21, 08[H01L]
2008/0191,363 ARCHITECTURE FOR FACE-TO-FACE BONDING BETWEEN SUBSTRATE AND MULTIPLE DAUGHTER CHIPSABANApr 14, 08Aug 14, 08[H01L]
2008/0180,129 FPGA ARCHITECTURE WITH THRESHOLD VOLTAGE COMPENSATION AND REDUCED LEAKAGEABANAug 30, 07Jul 31, 08[H03K]
2008/0144,393 BIT LINE PRE-SETTLEMENT CIRCUIT AND METHOD FOR FLASH MEMORY SENSING SCHEMEABANFeb 26, 08Jun 19, 08[G11C]

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