ALPHA & OMEGA SEMICONDUCTOR, LTD.
Patent Owner
Stats
- 175 US PATENTS IN FORCE
- 0 US APPLICATIONS PENDING
- Mar 31, 2016 most recent publication
Details
- 175 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 5,185 Total Citation Count
- Apr 10, 1995 Earliest Filing
- 18 Expired/Abandoned/Withdrawn Patents
Patent Activity in the Last 10 Years
Technologies
Intl Class
Technology
Matters
Rank in Class
Top Patents (by citation)
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Recent Publications
- No Recent Publications to Display
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
9214544 Source and body contact structure for trench-DMOS devices using polysiliconApr 18, 14Dec 15, 15[H01L]
8946942 Robust semiconductor power devices with design to protect transistor cells with slower switching speedMar 03, 08Feb 03, 15[H03K, H01L, H01H]
8878292 Self-aligned slotted accumulation-mode field effect transistor (AccuFET) structure and methodMar 02, 08Nov 04, 14[H01L]
8728890 Fabrication of MOS device with integrated Schottky diode in active region contact trenchApr 25, 13May 20, 14[H01L]
Expired/Abandoned/Withdrawn Patents
Patent #
Title
Status
Filing Date
Issue/Pub Date
Intl Class
2012/0267,787 Wafer Level Chip Scale Package Method Using Clip ArrayAbandonedJul 04, 12Oct 25, 12[H01L]
2012/0167,384 Method of Making a Low Profile Flip Chip Power ModuleAbandonedMar 12, 12Jul 05, 12[H05K]
2009/0242,973 SOURCE AND BODY CONTACT STRUCTURE FOR TRENCH-DMOS DEVICES USING POLYSILICONAbandonedMar 31, 08Oct 01, 09[H01L]
2009/0166,722 High voltage structures and methods for vertical power devices with improved manufacturabilityAbandonedDec 28, 07Jul 02, 09[H01L]
7541666 Semiconductor package having dimpled plate interconnectionsWithdrawnApr 30, 07Jun 02, 09[H01L]
2009/0115,018 Transient voltage suppressor manufactured in silicon on oxide (SOI) layerAbandonedNov 01, 07May 07, 09[H01L]
2009/0057,869 CO-PACKAGED HIGH-SIDE AND LOW-SIDE NMOSFETS FOR EFFICIENT DC-DC POWER CONVERSIONAbandonedAug 31, 07Mar 05, 09[H01L]
2009/0039,456 Structures and methods for forming Schottky diodes on a P-substrate or a bottom anode Schottky diodeAbandonedAug 08, 07Feb 12, 09[H01L]
2008/0242,052 Method of forming ultra thin chips of power devicesAbandonedMar 30, 07Oct 02, 08[H01L]
2008/0150,013 Split gate formation with high density plasma (HDP) oxide layer as inter-polysilicon insulation layerAbandonedDec 22, 06Jun 26, 08[H01L]
2007/0075,360 Cobalt silicon contact barrier metal process for high density semiconductor power devicesAbandonedSep 30, 05Apr 05, 07[H01L]
2006/0273,379 MOSFET using gate work function engineering for switching applicationsAbandonedJun 06, 05Dec 07, 06[H01L]
2006/0108,635 Trenched MOSFETS with part of the device formed on a (110) crystal planeAbandonedNov 23, 04May 25, 06[H01L]
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