ALTERA CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology MATTERS Rank in Class
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 1675 47
 
 
H03K PULSE TECHNIQUE 1013 2
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 430 111
 
 
G11C STATIC STORES 358 32
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 239 106
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 144 49
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 138 14
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 137 31
 
 
H03H IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS 81 16
 
 
H04B TRANSMISSION 72 139
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Top Patents (by citation)

Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0039,724 Method and Apparatus for Verifying Structural Correctness in Retimed Circuits Oct 22, 17 Feb 08, 18 [G06F]
2018/0032,857 Method and Apparatus for Performing Different Types of Convolution Operations with the Same Processing Elements Dec 01, 16 Feb 01, 18 [G06N]
2018/0006,653 INTEGRATED CIRCUITS WITH HYBRID FIXED/CONFIGURABLE CLOCK NETWORKS Jun 29, 16 Jan 04, 18 [G06F, H03K]
2018/0006,664 METHODS AND APPARATUS FOR PERFORMING REED-SOLOMON ENCODING BY LAGRANGIAN POLYNOMIAL FITTING Jun 29, 16 Jan 04, 18 [H03M]
2017/0337,318 Method and Apparatus for Implementing Soft Constraints in Tools Used for Designing Programmable Logic Devices Jul 30, 17 Nov 23, 17 [G06F]
2017/0328,951 EMBEDDED BUILT-IN SELF-TEST (BIST) CIRCUITRY FOR DIGITAL SIGNAL PROCESSOR (DSP) VALIDATION May 13, 16 Nov 16, 17 [G01R, G11C]
2017/0331,363 Current Limited Power Converter Circuits And Methods May 13, 16 Nov 16, 17 [H02M]
2017/0322,813 PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS Jul 28, 17 Nov 09, 17 [G06F]
2017/0316,120 Method and Apparatus for Implementing a System-Level Design Tool for Design Planning and Architecture Exploration Jul 14, 17 Nov 02, 17 [G06F]
2017/0287,543 ADAPTIVE REFRESH SCHEDULING FOR MEMORY Feb 01, 17 Oct 05, 17 [G11C]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9922150 Method and apparatus for satisfying operating conditions in a system design using an electronic design automation tool Nov 11, 14 Mar 20, 18 [G06F]
9922156 Method and apparatus for automatic hierarchical design partitioning Jul 31, 14 Mar 20, 18 [G06F]
9922157 Sector-based clock routing methods and apparatus Jul 17, 15 Mar 20, 18 [G06F]
9922693 Adaptive refresh scheduling for memory Feb 01, 17 Mar 20, 18 [G11C]
9923738 Backchannel transmission adaptation Sep 22, 16 Mar 20, 18 [H04L, H04B]
9917513 Integrated circuit voltage regulator with adaptive current bleeder circuit Dec 03, 14 Mar 13, 18 [G05F, H02M]
9910705 Modular offloading for computationally intensive tasks Feb 18, 15 Mar 06, 18 [G06F]
9911477 Memory controller architecture with improved memory scheduling efficiency Apr 18, 14 Mar 06, 18 [G11C, G06F]
9912337 Systems and methods for configuring an SOPC without a need to use an external memory Jan 06, 17 Mar 06, 18 [G06F, H03K]
9912369 Methods and apparatus for adaptively maintaining a communications link during idle mode Dec 08, 15 Mar 06, 18 [H04L, H04B]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2017/0365,643 PARALLEL CONFIGURED RESISTIVE MEMORY ELEMENTS Abandoned Jun 17, 16 Dec 21, 17 [H01L]
2017/0272,073 DYNAMIC PARAMETER OPERATION OF AN FPGA Abandoned Jun 30, 16 Sep 21, 17 [H03K]
2017/0237,433 Circuits and Methods For Impedance Calibration Abandoned May 01, 17 Aug 17, 17 [H03H, H03K]
9473112 Clock grid for integrated circuit Withdrawn Dec 20, 13 Oct 18, 16 [G06F, H03K]
2016/0225,437 METHODS AND APPARATUS FOR REDUCING POWER CONSUMPTION IN MEMORY CIRCUITRY BY CONTROLLING PRECHARGE DURATION Abandoned Feb 04, 15 Aug 04, 16 [G11C]
9257982 Error resilient packaged components Withdrawn Jul 26, 13 Feb 09, 16 [H03K]
2015/0263,082 INDUCTOR STRUCTURES WITH IMPROVED QUALITY FACTOR Abandoned Mar 11, 14 Sep 17, 15 [H01L]
2015/0206,965 HIGH PERFORMANCE FINFET Abandoned Mar 22, 14 Jul 23, 15 [H01L]
2015/0200,156 MODULE HAVING MIRROR-SYMMETRIC TERMINALS AND METHODS OF FORMING THE SAME Abandoned Jan 13, 14 Jul 16, 15 [H01L]
2015/0194,964 CONTROLLABLE STORAGE ELEMENTS FOR AN IC Abandoned Nov 26, 14 Jul 09, 15 [H03K]
2015/0170,864 THREE ELECTRODE CIRCUIT ELEMENT Abandoned Jun 05, 14 Jun 18, 15 [H01J]
2015/0130,508 Non-Sequentially Configurable IC Abandoned Jul 14, 14 May 14, 15 [H03K]
2015/0135,148 DECISION MODULES Abandoned Nov 10, 14 May 14, 15 [G06F]
2015/0040,094 SEQUENTIAL DELAY ANALYSIS BY PLACEMENT ENGINES Abandoned Aug 15, 14 Feb 05, 15 [G06F]
2015/0012,903 NON-INTRUSIVE MONITORING AND CONTROL OF INTEGRATED CIRCUITS Abandoned May 19, 14 Jan 08, 15 [G06F]
2014/0374,877 Integrated Circuits With On-Die Decoupling Capacitors Abandoned Jun 21, 13 Dec 25, 14 [H01L]
2014/0355,665 Adaptive Video Reference Frame Compression with Control Elements Abandoned May 31, 13 Dec 04, 14 [H04N]
2014/0355,683 Data Encoding for Attenuating Image Encoders Abandoned May 31, 13 Dec 04, 14 [H04N]
2014/0264,783 APPARATUS FOR ELECTRONIC ASSEMBLY WITH IMPROVED INTERCONNECT AND ASSOCIATED METHODS Abandoned Mar 13, 13 Sep 18, 14 [H01L]
2014/0255,028 SUB-RATE MAPPING FOR LOWEST-ORDER OPTICAL DATA UNIT Abandoned Mar 08, 13 Sep 11, 14 [H04B]

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