CHUNG CHENG HOLDINGS, LLC
Patent Owner
Stats
- 44 US PATENTS IN FORCE
- 0 US APPLICATIONS PENDING
- Jun 06, 2006 most recent publication
Details
- 44 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 578 Total Citation Count
- May 11, 1992 Earliest Filing
- 30 Expired/Abandoned/Withdrawn Patents
Patent Activity in the Last 10 Years
Technologies
Intl Class
Technology
Matters
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Top Patents (by citation)
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Recent Publications
- No Recent Publications to Display
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
6746911 Semiconductor device with stacked memory and logic substrates and method for fabricating the sameMay 22, 03Jun 08, 04[H01L]
6720653 Metal layer in semiconductor device including a planar stuffed layer and an insulating film with a projection and method for fabricating the sameNov 15, 01Apr 13, 04[H01L]
6593184 Semiconductor device with stacked memory and logic substrates and method for fabricating the sameJul 27, 01Jul 15, 03[H01L]
6441497 Semiconductor device fabricated on multiple substrates and method for fabricating the sameOct 16, 01Aug 27, 02[H01L]
Expired/Abandoned/Withdrawn Patents
Patent #
Title
Status
Filing Date
Issue/Pub Date
Intl Class
7056790 DRAM cell having MOS capacitor and method for manufacturing the sameExpiredDec 16, 03Jun 06, 06[H01L]
6969665 Method of forming an isolation film in a semiconductor deviceExpiredJul 03, 03Nov 29, 05[H01L]
2005/0172,256 Mask set for measuring an overlapping error and method of measuring an overlapping error using the sameAbandonedMar 08, 04Aug 04, 05[G06F]
6869871 Method of forming metal line in semiconductor device including forming first and second zirconium filmsExpiredDec 23, 03Mar 22, 05[H01L]
6845443 Method of processing a repeat block efficiently in a processor wherein the repeat count is not decremented in a specific case to prevent error in executionExpiredDec 29, 00Jan 18, 05[G06F]
2004/0253,779 Method for manufacturing a bipolar transistor using a CMOS processAbandonedMar 16, 04Dec 16, 04[H01L]
6730528 Mask set for measuring an overlapping error and method of measuring an overlapping error using the sameExpiredDec 22, 97May 04, 04[H01L]
6686289 Method for minimizing variation in etch rate of semiconductor wafer caused by variation in mask pattern densityExpiredJan 09, 02Feb 03, 04[H01L]
6566717 Integrated circuit with silicided ESD protection transistorsExpiredSep 07, 01May 20, 03[H01L]
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