CYPRESS SEMICONDUCTOR CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 66667
 
 
 
G11C STATIC STORES 55822
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 410162
 
 
 
H03K PULSE TECHNIQUE 13535
 
 
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 10327
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 8185
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 4042
 
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 3873
 
 
 
H04B TRANSMISSION 35170
 
 
 
G09G ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION 32116

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0024,945 Context-based protection systemJul 18, 17Jan 25, 18[G06F]
2018/0025,199 NON-FINGER OBJECT REJECTION FOR FINGERPRINT SENSORSSep 22, 17Jan 25, 18[G06K]
2018/0025,202 Anti-Spoofing Protection for Fingerprint ControllersMar 22, 17Jan 25, 18[G06K]
2018/0011,718 RE-ENUMERATION OF USB 3.0 COMPATIBLE DEVICESJul 20, 17Jan 11, 18[G06F]
2018/0012,055 FINGERPRINT SENSOR PATTERNJun 22, 17Jan 11, 18[G06K]
2018/0003,752 DETECT AND DIFFERENTIATE TOUCHES FROM DIFFERENT SIZE CONDUCTIVE OBJECTS ON A CAPACITIVE BUTTONJul 26, 17Jan 04, 18[G01R]
2018/0006,132 VARIED SILICON RICHNESS SILICON NITRIDE FORMATIONAug 30, 17Jan 04, 18[H01L]
2017/0371,451 PROVIDING A BASELINE CAPACITANCE FOR A CAPACITANCE SENSING CHANNELJul 26, 17Dec 28, 17[G06F]
2017/0371,824 BUS SHARING SCHEMEJul 11, 17Dec 28, 17[G06F]
2017/0371,992 INTEGRATED CIRCUIT INCLUDING PARAMETRIC ANALOG ELEMENTSMay 31, 17Dec 28, 17[G06F]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9880536 Autonomous control in a programmable systemSep 25, 15Jan 30, 18[G05B, H04L, G06F]
9881683 Suppression of program disturb with bit line and select gate voltage regulationApr 25, 17Jan 30, 18[G11C]
9876020 Integration of a memory transistor into high-k, metal gate CMOS process flowOct 17, 14Jan 23, 18[H01L]
9871374 Protecting circuit and integrated circuitOct 10, 16Jan 16, 18[H02H]
9872346 Phase controller apparatus and methodsSep 25, 15Jan 16, 18[H03H, H05B]
9863988 Input/output multiplexer busOct 31, 16Jan 09, 18[G01R, G01D, G06F]
9864607 Methods and physical computer-readable storage media for initiating re-enumeration of USB 3.0 compatible devicesMar 31, 15Jan 09, 18[G06F]
9864894 Capacitive fingerprint sensor with quadrature demodulator and multiphase scanningJan 03, 17Jan 09, 18[G01R, G06K]
9865711 Methods to integrate SONOS into CMOS flowDec 19, 14Jan 09, 18[H01L]
9866055 Automatic scheme to detect multi-standard charger typesDec 18, 15Jan 09, 18[G06F, H02J]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2015/0255,480 Method to Improve Charge Trap Flash Memory Top Oxide QualityABANMay 06, 14Sep 10, 15[H01L]
2015/0200,295 Drain Extended MOS Transistors With Split ChannelABANSep 24, 14Jul 16, 15[H01L]
2015/0194,499 VARIED SILICON RICHNESS SILICON NITRIDE FORMATIONABANMar 23, 15Jul 09, 15[H01L]
2015/0194,537 MULTI-LAYER INTER-GATE DIELECTRIC STRUCTUREABANJan 07, 14Jul 09, 15[H01L]
2015/0187,960 Radical Oxidation Process For Fabricating A Nonvolatile Charge Trap Memory DeviceABANJan 26, 15Jul 02, 15[H01L]
2015/0162,226 Forming Charge Trap Separation in a Flash Memory Semiconductor DeviceABANFeb 19, 15Jun 11, 15[H01L]
2015/0155,162 Reduction of Charging Induced Damage in Photolithography Wet ProcessABANDec 03, 13Jun 04, 15[H01L]
2015/0097,224 BURIED TRENCH ISOLATION IN INTEGRATED CIRCUITSABANOct 08, 13Apr 09, 15[H01L]
2015/0035,044 Method to Improve Charge Trap Flash Memory Core Cell Performance and ReliabilityABANSep 15, 14Feb 05, 15[H01L]
2015/0003,182 MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATEABANSep 15, 14Jan 01, 15[G11C]
2014/0332,876 HIGH VOLTAGE GATE FORMATIONABANJul 24, 14Nov 13, 14[H01L]
2014/0327,553 ZERO POWER METERING CIRCUITS, SYSTEMS AND METHODSABANSep 26, 13Nov 06, 14[G01D]
2014/0293,717 MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATEABANJan 14, 14Oct 02, 14[G11C]
2014/0233,339 APPARATUS AND METHOD TO REDUCE BIT LINE DISTURBSABANFeb 18, 13Aug 21, 14[G11C]
2014/0225,177 FLASH MEMORY CELLS HAVING TRENCHED STORAGE ELEMENTSABANApr 16, 14Aug 14, 14[H01L]
2014/0210,012 Manufacturing of FET Devices Having Lightly Doped Drain and Source RegionsABANJan 31, 13Jul 31, 14[H01L]
2014/0215,111 VARIABLE READ LATENCY ON A SERIAL MEMORY BUSABANMar 28, 14Jul 31, 14[G06F]
2014/0191,308 SELF-ALIGNED DOUBLE PATTERNING FOR MEMORY AND OTHER MICROELECTRONIC DEVICESABANMar 11, 14Jul 10, 14[H01L]
2014/0195,233 Distributed Speech Recognition SystemABANJan 08, 13Jul 10, 14[G10L]
2014/0167,136 Charge Trapping Device with Improved Select Gate to Memory Gate IsoloationABANDec 14, 12Jun 19, 14[H01L]

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