FAUST COMMUNICATIONS, LLC

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Technologies

Intl Class Technology # of Patents Rank
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 22278
 
 
 
G09G ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION 15104
 
 
 
H04N PICTORIAL COMMUNICATION, e.g. TELEVISION 9145
 
 
 
G06T IMAGE DATA PROCESSING OR GENERATION, IN GENERAL 565
 
 
 
G06K RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS 4137
 
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 492
 
 
 
G11C STATIC STORES 2127
 
 
 
H03K PULSE TECHNIQUE 2104
 
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 2166
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 1127

Top Patents (by citation)

Patent # Title Filing Date Issue Date Intl Class Cited #
6,564,329 System and method for dynamic clock generationMar 16, 99May 13, 03[G06F]162
6,424,658 Store-and-forward network switch using an embedded DRAMFeb 17, 99Jul 23, 02[H04L]147
5,615,376 Clock management for power reduction in a video display sub-systemAug 03, 94Mar 25, 97[G06F]140
5,506,499 Multiple probing of an auxilary test pad which allows for reliable bonding to a primary bonding padJun 05, 95Apr 09, 96[G01R, H01K, H05K]125
5,907,295 Audio sample-rate conversion using a linear-interpolation stage with a multi-tap low-pass filter requiring reduced coefficient storageAug 04, 97May 25, 99[H03M]80
6,308,220 Circulating parallel-search engine with random inputs for network routing table stored in a wide embedded DRAMJan 29, 99Oct 23, 01[G06F, H01L]77
6,157,978 Multimedia round-robin arbitration with phantom slots for super-priority real-time agentJan 06, 99Dec 05, 00[G06F]76
6,016,151 3D triangle rendering by texture hardware and color software using simultaneous triangle-walking and interpolation for parallel operationSep 12, 97Jan 18, 00[G06T]70
5,970,110 Precise, low-jitter fractional divider using counter of rotating clock phasesJan 09, 98Oct 19, 99[H03K]67
6,049,316 PC with multiple video-display refresh-rate configurations using active and default registersJun 12, 97Apr 11, 00[G09G]57

Recent Publications

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
RE43357 Color interpolator and horizontal/vertical edge enhancer using two line buffer and alternating even/odd filters for digital cameraSep 30, 05May 08, 12[H04N, G06K]
RE43235 Single-block virtual frame buffer translated to multiple physical blocks for multi-block display refresh generatorMay 28, 10Mar 13, 12[G09G, G06F]
RE43085 Adaptive pixel-level color enhancement for a digital cameraApr 13, 06Jan 10, 12[H04N]
RE42555 Merged pipeline for color interpolation and edge enhancement of digital imagesNov 04, 05Jul 19, 11[H04N]
RE41967 Single-block virtual frame buffer translated to multiple physical blocks for multi-block display refresh generatorJan 20, 06Nov 30, 10[G09G, G06F]
RE41631 Multi-stage function mapping for a range of input valuesSep 14, 06Sep 07, 10[G09G]
RE41523 Graphics engine command FIFO for programming multiple registers using a mapping index with register offsetsMay 25, 06Aug 17, 10[G09G]
RE39963 System and method for dynamic clock generationMay 13, 05Dec 25, 07[G06F]
RE39578 Pipelined carry-lookahead generation for a fast incrementerJul 07, 05Apr 17, 07[G06F]
6,791,576 Gamma correction using double mapping with ratiometrically-related segments of two different ratiosFeb 23, 00Sep 14, 04[G09G]

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Top Inventors for This Owner

Inventor Name Address # of Patent/Pub
Lin Tao
Fremont, CA
17
Bassetti Chester F
Pleasanton, CA
7
Ranganathan Ravi
Cupertino, CA
6
Cheung Edmund
Palo Alto, CA
5
Lu Hsuehchung Shelton
Milpitas, CA
5
Pimpalkhare Mangesh S
Santa Clara, CA
5
Rosman Andrew
Palo Alto, CA
5
Dharmarajan Krishnan C
Fremont, CA
4
Tang Tianhua
Sunnyvale, CA
4
Brannon Sherwood
Mountain View, CA
3