FUJITSU SIEMENS COMPUTERS LLC.
Patent Owner
Stats
- 10 total patents issued
- 2 Total Apps Published
- Jul 29, 2008 most recent publication
Details
- 10 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 149 Total Citation Count
- Aug 14, 1992 Earliest Filing
- 1 Expired/Abandoned/Withdrawn Patents
Technologies
Intl Class
Technology
# of Patents
Rank
Top Patents (by citation)
Patent #
Title
Filing Date
Issue Date
Intl Class
Cited #
5,355,471 Multiprocessor cache coherency tester that exercises the coherency logic exhaustively and also detects errors in a processor using an automatic CPU sortAug 14, 92Oct 11, 94[G06F]25
5,581,713 Multiprocessor computer backplane bus in which bus transactions are classified into different classes for arbitrationNov 15, 95Dec 03, 96[G06F]19
6,026,444 TORUS routing element error handling and self-clearing with link lockup preventionJun 24, 98Feb 15, 00[G06F]8
6,408,002 Torus routing element error handling and self-clearing with missing or extraneous control code featureJun 24, 98Jun 18, 02[H04J, H04L]3
7,043,612 Compute node to mesh interface for highly scalable parallel processing system and method of exchanging dataJun 02, 03May 09, 06[G06F]1
Recent Publications
Publication #
Title
Filing Date
Pub Date
Intl Class
2004/0044,821 Compute node to mesh interface for highly scalable parallel processing system and method of exchanging dataJun 02, 03Mar 04, 04[G06F]
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
7,043,612 Compute node to mesh interface for highly scalable parallel processing system and method of exchanging dataJun 02, 03May 09, 06[G06F]
6,408,002 Torus routing element error handling and self-clearing with missing or extraneous control code featureJun 24, 98Jun 18, 02[H04J, H04L]
6,026,444 TORUS routing element error handling and self-clearing with link lockup preventionJun 24, 98Feb 15, 00[G06F]
5,581,713 Multiprocessor computer backplane bus in which bus transactions are classified into different classes for arbitrationNov 15, 95Dec 03, 96[G06F]
5,355,471 Multiprocessor cache coherency tester that exercises the coherency logic exhaustively and also detects errors in a processor using an automatic CPU sortAug 14, 92Oct 11, 94[G06F]
Top Inventors for This Owner
Inventor Name
Address
# of Patent/Pub
