INTELLECTUAL VENTURE FUNDING LLC

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
G06F ELECTRIC DIGITAL DATA PROCESSING 14433

Top Patents (by citation)

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Recent Publications

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
7831799 Speculative address translation for processor using segmentation and optional pagingNov 01, 04Nov 09, 10[G06F]
6430668 Speculative address translation for processor using segmentation and optical pagingJan 10, 01Aug 06, 02[G06F]
5983334 Superscalar microprocessor for out-of-order and concurrently executing at least two RISC instructions translating from in-order CISC instructionsJan 16, 97Nov 09, 99[G06F]
5974526 Superscalar RISC instruction schedulingDec 15, 97Oct 26, 99[G06F]
5960466 Computer address translation using fast address generator during a segmentation operation performed on a virtual addressAug 04, 97Sep 28, 99[G06F]
5838986 RISC microprocessor architecture implementing multiple typed register setsSep 25, 97Nov 17, 98[G06F]
5737624 Superscalar risc instruction schedulingJan 31, 96Apr 07, 98[G06F]
5682546 RISC microprocessor architecture implementing multiple typed register setsJun 19, 96Oct 28, 97[G06F]
5619666 System for translating non-native instructions to native instructions and combining them into a final bucket for processing on a host processorJun 02, 95Apr 08, 97[G06F]
5560035 RISC microprocessor architecture implementing multiple typed register setsJun 05, 95Sep 24, 96[G06F]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2015/0145,580 APPARATUS FOR CONTROLLING SEMICONDUCTOR CHIP CHARACTERISTICSAbandonedDec 30, 08May 28, 15[H03K, G06F]
7941636 RISC microprocessor architecture implementing multiple typed register setsExpiredDec 31, 09May 10, 11[G06F]
7904891 Checking for instruction invariance to execute previously obtained translation code by comparing instruction to a copy stored when write operation to the memory portion occurExpiredJul 22, 08Mar 08, 11[G06F]
7889014 Ring based impedance control of an output driverExpiredNov 20, 07Feb 15, 11[H03K]
7872492 Triple latch flip flop system and methodExpiredFeb 24, 09Jan 18, 11[H03K]
7802074 Superscalar RISC instruction schedulingExpiredApr 02, 07Sep 21, 10[G06F]
7747974 Method and apparatus for optimizing body bias connections in CMOS circuits using a deep n-well grid structureExpiredJan 03, 07Jun 29, 10[G06F]
7737749 Elastic pipeline latch with a safe modeExpiredAug 14, 07Jun 15, 10[H03K]
7724025 Leakage efficient anti-glitch filterExpiredFeb 19, 08May 25, 10[H03K]
7705350 Fractional biasing of semiconductorsExpiredAug 08, 05Apr 27, 10[H01L]
7707562 Code translation verificationExpiredMar 31, 05Apr 27, 10[G06F]
7692477 Precise control component for a substrate potential regulation circuitExpiredDec 23, 03Apr 06, 10[H03K]
7685402 RISC microprocessor architecture implementing multiple typed register setsExpiredJan 09, 07Mar 23, 10[G06F]
7664935 System and method for translating non-native instructions to native instructions for processing on a host processorExpiredMar 11, 08Feb 16, 10[G06F]
7555631 RISC microprocessor architecture implementing multiple typed register setsExpiredJan 31, 02Jun 30, 09[G06F]
7343473 System and method for translating non-native instructions to native instructions for processing on a host processorExpiredJun 28, 05Mar 11, 08[G06F]
2007/0233,961 Multi-portioned instruction memoryAbandonedMar 31, 06Oct 04, 07[G06F]
7174528 Method and apparatus for optimizing body bias connections in CMOS circuits using a deep n-well grid structureExpiredOct 10, 03Feb 06, 07[G06F]
2007/0013,425 Lower minimum retention voltage storage elementsAbandonedJun 30, 05Jan 18, 07[H03K]
2006/0179,308 System and method for providing a secure boot architectureAbandonedFeb 07, 05Aug 10, 06[H04L]

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