INVENSAS CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 58073
 
 
 
G11C STATIC STORES 10468
 
 
 
H05K PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS 7874
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 38384
 
 
 
B23K SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM 2460
 
 
 
C25D PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING 1237
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 10148
 
 
 
H01R ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS 10122
 
 
 
H03K PULSE TECHNIQUE 7124
 
 
 
H01K ELECTRIC INCANDESCENT LAMPS 617

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2017/0018,485 FLIPPED DIE STACK ASSEMBLIES WITH LEADFRAME INTERCONNECTSJul 13, 16Jan 19, 17[H01L]
2017/0018,510 MICROELECTRONIC ASSEMBLIES WITH CAVITIES, AND METHODS OF FABRICATIONSep 29, 16Jan 19, 17[H01L]
2017/0018,517 MICROELECTRONIC ASSEMBLIES FORMED USING METAL SILICIDE, AND METHODS OF FABRICATIONJul 06, 16Jan 19, 17[H01L]
2017/0018,529 FLIPPED DIE STACKJul 13, 16Jan 19, 17[H01L]
2017/0012,021 STRUCTURES AND METHODS FOR LOW TEMPERATURE BONDINGJul 10, 15Jan 12, 17[H01L]
2016/0379,885 STRUCTURES AND METHODS FOR RELIABLE PACKAGESJun 24, 15Dec 29, 16[H01L]
2016/0379,967 LAMINATED INTERPOSERS AND PACKAGES WITH EMBEDDED TRACE INTERCONNECTSJun 20, 16Dec 29, 16[H01L, H05K]
2016/0365,302 REVERSED BUILD-UP SUBSTRATE FOR 2.5DAug 26, 16Dec 15, 16[H01L]
2016/0343,613 THROUGH-DIELECTRIC-VIAS (TDVs) FOR 3D INTEGRATED CIRCUITS IN SILICONMay 17, 16Nov 24, 16[H01L]
2016/0336,286 CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHODS OF MANUFACTUREJul 27, 16Nov 17, 16[H01L, H05K]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9,548,101 Retention optimized memory device using predictive data inversionMar 09, 16Jan 17, 17[G11C]
9,548,145 Microelectronic assembly with multi-layer support structureDec 04, 13Jan 17, 17[H01B, H01L]
9,548,273 Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assembliesMay 05, 15Jan 17, 17[H01L]
9,543,277 Wafer level packages with mechanically decoupled fan-in and fan-out areasAug 20, 15Jan 10, 17[H01L]
9,536,862 Microelectronic assemblies with integrated circuits and interposers with cavities, and methods of manufactureDec 28, 15Jan 03, 17[H01L]
9,530,458 Stub minimization using duplicate sets of signal terminalsDec 08, 15Dec 27, 16[G11C, H01L]
9,530,749 Coupling of side surface contacts to a circuit platformApr 28, 15Dec 27, 16[B81C, B23K, B81B, H01L, H05K]
9,530,945 Integrated circuit deviceNov 25, 13Dec 27, 16[H01L]
9,524,883 Holding of interposers and other microelectronic workpieces in position during assembly and other processingNov 06, 14Dec 20, 16[H01L]
9,524,943 Compact semiconductor package and related methodsFeb 08, 16Dec 20, 16[H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
9,496,242 Stackable microelectronic package structuresWithdrawnMar 16, 15Nov 15, 16[B81C, H01L]
9,418,879 Low cost interposer and method of fabricationWithdrawnMar 14, 13Aug 16, 16[H01L]
9,117,827 Making electrical components in handle wafers of integrated circuit packagesWithdrawnMay 02, 14Aug 25, 15[H01L]
2014/0008,676 OPTICAL ENHANCEMENT OF LIGHT EMITTING DEVICESABANJul 03, 12Jan 09, 14[H01L]
2013/0247,372 MULTILAYER WIRING BOARD FOR AN ELECTRONIC DEVICEABANMay 17, 13Sep 26, 13[H05K]
2013/0186,944 MICROELECTRONIC SUBSTRATE OR ELEMENT HAVING CONDUCTIVE PADS AND METAL POSTS JOINED THERETO USING BOND LAYERABANMar 12, 13Jul 25, 13[H01L]
2013/0119,012 INTERCONNECTION ELEMENT FOR ELECTRIC CIRCUITSABANOct 26, 12May 16, 13[H01R]
2013/0119,117 BONDING WEDGEABANNov 02, 12May 16, 13[H01L]
2013/0070,437 HYBRID INTERPOSERABANSep 20, 11Mar 21, 13[H01R, H05K]
2013/0068,516 HIGH IO SUBSTRATES AND INTERPOSERS WITHOUT VIASABANSep 19, 11Mar 21, 13[H05K]
2013/0037,312 HIGH DENSITY TRACE FORMATION METHOD BY LASER ABLATIONABANAug 10, 11Feb 14, 13[B05D, B32B, H05K]
8,310,036 Chips having rear contacts connected by through vias to front contactsExpiredMay 21, 10Nov 13, 12[H01L]
8,119,516 Bump structure formed from using removable mandrelExpiredNov 04, 08Feb 21, 12[H01L]
8,112,881 Method for manufacturing multilayer wiring boardExpiredSep 29, 05Feb 14, 12[H05K]
2011/0197,655 MULTI-LAYERED CERAMIC MICRO-GAS CHROMATOGRAPH AND METHOD FOR MAKING THE SAMEABANDec 07, 10Aug 18, 11[G01N]
7,856,444 Performing a search using a search parameterExpiredDec 27, 04Dec 21, 10[G06F]
7,843,046 Flat leadless packages and stacked leadless package assembliesExpiredAug 27, 08Nov 30, 10[H01L]
2010/0242,270 Wiring circuit board, manufacturing method for the wiring circuit board, and circuit moduleABANFeb 16, 10Sep 30, 10[H01K]
2010/0071,944 CHIP CAPACITOR EMBEDDED PWBABANDec 17, 07Mar 25, 10[H05K]
2010/0044,860 Microelectronic substrate or element having conductive pads and metal posts joined thereto using bond layerABANJul 30, 09Feb 25, 10[H01L]

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