INVENSAS CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 55280
 
 
 
G11C STATIC STORES 10070
 
 
 
H05K PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS 7676
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 37380
 
 
 
B23K SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM 2463
 
 
 
C25D PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING 1137
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 10143
 
 
 
H01R ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS 10119
 
 
 
H03K PULSE TECHNIQUE 7117
 
 
 
H01K ELECTRIC INCANDESCENT LAMPS 616

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2016/0276,294 INTEGRATED CIRCUIT ASSEMBLIES WITH REINFORCEMENT FRAMES, AND METHODS OF MANUFACTUREMay 26, 16Sep 22, 16[H01L]
2016/0276,296 TUNABLE COMPOSITE INTERPOSERJun 02, 16Sep 22, 16[H01L]
2016/0276,316 STUB MINIMIZATION FOR WIREBOND ASSEMBLIES WITHOUT WINDOWSMay 31, 16Sep 22, 16[G06F, H01L, H05K]
2016/0267,954 REDUCED LOAD MEMORY MODULEMar 12, 15Sep 15, 16[G11C]
2016/0268,187 STUB MINIMIZATION FOR ASSEMBLIES WITHOUT WIREBONDS TO PACKAGE SUBSTRATEMay 26, 16Sep 15, 16[H01L]
2016/0268,205 POLYMER MEMBER BASED INTERCONNECTMay 19, 16Sep 15, 16[H01L]
2016/0260,647 METHOD FOR PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACEMay 19, 16Sep 08, 16[H01L]
2016/0260,671 MICROELECTRONIC PACKAGE WITH CONSOLIDATED CHIP STRUCTURESMay 17, 16Sep 08, 16[H01L]
2016/0260,687 EMBEDDED GRAPHITE HEAT SPREADER FOR 3DICMar 05, 15Sep 08, 16[H01L]
2016/0260,696 BATCH PROCESS FABRICATION OF PACKAGE-ON-PACKAGE MICROELECTRONIC ASSEMBLIESMay 12, 16Sep 08, 16[H01L]
2016/0262,268 PRESSING OF WIRE BOND WIRE TIPS TO PROVIDE BENT-OVER TIPSMar 05, 15Sep 08, 16[B29C, H05K]
2016/0254,205 DEVICE AND METHOD FOR LOCALIZED UNDERFILLMay 10, 16Sep 01, 16[H01L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9,443,837 Z-connection for a microelectronic package using electroless platingMay 11, 15Sep 13, 16[H01L]
9,437,536 Reversed build-up substrate for 2.5DOct 16, 15Sep 06, 16[H01L]
9,437,566 Conductive connections, structures with such connections, and methods of manufactureMay 12, 14Sep 06, 16[B23K, H01L, H05K]
9,433,093 High strength through-substrate viasJul 21, 14Aug 30, 16[H01L, H05K]
9,423,824 Stub minimization for multi-die wirebond assemblies with parallel windowsMar 16, 15Aug 23, 16[G11C, G06F, H01L]
9,425,167 Stackable microelectronic package structuresMar 16, 15Aug 23, 16[B81C, H01L]
9,418,879 Low cost interposer and method of fabricationMar 14, 13Aug 16, 16[H01L]
9,418,924 Stacked die integrated circuitMar 20, 14Aug 16, 16[H01L]
9,412,646 Via in substrate with deposited layerJan 26, 15Aug 09, 16[H01L]
9,412,714 Wire bond support structure and microelectronic package including wire bonds therefromMay 30, 14Aug 09, 16[H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
9,117,827 Making electrical components in handle wafers of integrated circuit packagesWithdrawnMay 02, 14Aug 25, 15[H01L]
2014/0008,676 OPTICAL ENHANCEMENT OF LIGHT EMITTING DEVICESABANJul 03, 12Jan 09, 14[H01L]
2013/0247,372 MULTILAYER WIRING BOARD FOR AN ELECTRONIC DEVICEABANMay 17, 13Sep 26, 13[H05K]
2013/0186,944 MICROELECTRONIC SUBSTRATE OR ELEMENT HAVING CONDUCTIVE PADS AND METAL POSTS JOINED THERETO USING BOND LAYERABANMar 12, 13Jul 25, 13[H01L]
2013/0119,012 INTERCONNECTION ELEMENT FOR ELECTRIC CIRCUITSABANOct 26, 12May 16, 13[H01R]
2013/0119,117 BONDING WEDGEABANNov 02, 12May 16, 13[H01L]
2013/0070,437 HYBRID INTERPOSERABANSep 20, 11Mar 21, 13[H01R, H05K]
2013/0068,516 HIGH IO SUBSTRATES AND INTERPOSERS WITHOUT VIASABANSep 19, 11Mar 21, 13[H05K]
2013/0037,312 HIGH DENSITY TRACE FORMATION METHOD BY LASER ABLATIONABANAug 10, 11Feb 14, 13[B05D, B32B, H05K]
8,119,516 Bump structure formed from using removable mandrelExpiredNov 04, 08Feb 21, 12[H01L]
8,112,881 Method for manufacturing multilayer wiring boardExpiredSep 29, 05Feb 14, 12[H05K]
2011/0197,655 MULTI-LAYERED CERAMIC MICRO-GAS CHROMATOGRAPH AND METHOD FOR MAKING THE SAMEABANDec 07, 10Aug 18, 11[G01N]
7,856,444 Performing a search using a search parameterExpiredDec 27, 04Dec 21, 10[G06F]
7,843,046 Flat leadless packages and stacked leadless package assembliesExpiredAug 27, 08Nov 30, 10[H01L]
2010/0242,270 Wiring circuit board, manufacturing method for the wiring circuit board, and circuit moduleABANFeb 16, 10Sep 30, 10[H01K]
2010/0071,944 CHIP CAPACITOR EMBEDDED PWBABANDec 17, 07Mar 25, 10[H05K]
2010/0044,860 Microelectronic substrate or element having conductive pads and metal posts joined thereto using bond layerABANJul 30, 09Feb 25, 10[H01L]
2009/0106,488 STATIC RANDOM ACCESS MEMORY (SRAM) COMPATIBLE, HIGH AVAILABILITY MEMORY ARRAY AND METHOD EMPLOYING SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (DRAM) IN CONJUNCTION WITH A DATA CACHE AND SEPARATE READ AND WRITE REGISTERS AND TAG BLOCKSABANOct 20, 08Apr 23, 09[G06F]
2009/0071,707 Multilayer substrate with interconnection vias and method of manufacturing the sameABANAug 13, 08Mar 19, 09[H05K, C25D]
2008/0296,254 Multilayer wiring board for an electronic deviceABANJan 11, 08Dec 04, 08[C23F]

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