INVENSAS CORPORATION

Patent Owner

Watch Compare Add to Portfolio

Stats

Details

Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 66770
 
 
 
G11C STATIC STORES 11666
 
 
 
H05K PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS 9568
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 40407
 
 
 
B23K SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM 2667
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 12147
 
 
 
C25D PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING 1140
 
 
 
H01R ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS 11122
 
 
 
B81C PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICRO-STRUCTURAL DEVICES OR SYSTEMS 824
 
 
 
H03K PULSE TECHNIQUE 8123

Top Patents (by citation)

Upgrade to the Premium Level to View Top Patents for this Owner. Learn More

Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0076,278 MAKING ELECTRICAL COMPONENTS IN HANDLE WAFERS OF INTEGRATED CIRCUIT PACKAGESNov 06, 17Mar 15, 18[H01L]
2018/0068,930 SSI PoPSep 20, 17Mar 08, 18[H01L]
2018/0061,774 Wire Bond Wires for Interference ShieldingNov 06, 17Mar 01, 18[H01L]
2018/0047,704 MULTI-CHIP PACKAGE WITH INTERCONNECTS EXTENDING THROUGH LOGIC CHIPOct 31, 17Feb 15, 18[H01L]
2018/0040,544 Multi-surface edge pads for vertical mount packages and methods of making package stacksJul 26, 17Feb 08, 18[H01L, H05K]
2018/0040,572 Warpage Balancing in Thin PackagesAug 07, 17Feb 08, 18[B23K, H01L]
2018/0040,587 Vertical Memory Module Enabled by Fan-Out Redistribution LayerAug 04, 17Feb 08, 18[H01L]
2018/0040,589 MICROELECTRONIC PACKAGES AND ASSEMBLIES WITH REPEATERSAug 03, 16Feb 08, 18[G11C, H01L]
2018/0025,987 Wafer-Level Packaged Components and Methods ThereforDec 28, 16Jan 25, 18[H01L]
2018/0026,007 PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BOND VIASSep 08, 17Jan 25, 18[H01L, H05K]

View all Publication..

Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9917042 2.5D microelectronic assembly and method with circuit structure formed on carrierMay 05, 16Mar 13, 18[H01L]
9917073 Reconstituted wafer-level package dram with conductive interconnects formed in encapsulant at periphery of the packageJun 29, 16Mar 13, 18[H01L]
9911717 Stackable microelectronic package structuresMar 16, 15Mar 06, 18[B81C, H01L]
9911718 ‘RDL-First’ packaged microelectronic device for a package-on-package deviceNov 16, 16Mar 06, 18[H01L]
9905507 Circuit assemblies with multiple interposer substrates, and methods of fabricationJun 14, 16Feb 27, 18[H01L, H05K]
9905523 Microelectronic assemblies formed using metal silicide, and methods of fabricationJul 06, 16Feb 27, 18[H01L]
9905537 Compact semiconductor package and related methodsNov 23, 16Feb 27, 18[H01L]
9899281 Integrated circuits protected by substrates with cavities, and methods of manufactureSep 14, 16Feb 20, 18[H01L]
9899442 Image sensor deviceNov 18, 15Feb 20, 18[H01L]
9893030 Reliable device assemblyJul 18, 16Feb 13, 18[H01L, H05K]

View all patents..

Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
9496242 Stackable microelectronic package structuresWithdrawnMar 16, 15Nov 15, 16[B81C, H01L]
2016/0260,671 MICROELECTRONIC PACKAGE WITH CONSOLIDATED CHIP STRUCTURESABANMay 17, 16Sep 08, 16[H01L]
9418879 Low cost interposer and method of fabricationWithdrawnMar 14, 13Aug 16, 16[H01L]
2016/0218,088 SUPPORT MOUNTED ELECTRICALLY INTERCONNECTED DIE ASSEMBLYABANMar 31, 16Jul 28, 16[H01L]
2015/0371,938 BACK-END-OF-LINE STACK FOR A STACKED DEVICEABANJun 19, 14Dec 24, 15[H01L]
2015/0295,151 HIGH PERFORMANCE LIGHT EMITTING DIODE WITH VIASABANAug 23, 14Oct 15, 15[H01L]
2015/0262,902 INTEGRATED CIRCUITS PROTECTED BY SUBSTRATES WITH CAVITIES, AND METHODS OF MANUFACTUREABANMar 14, 14Sep 17, 15[H01L]
2015/0263,252 OPTICAL ENHANCEMENT OF LIGHT EMITTING DEVICESABANJun 01, 15Sep 17, 15[H01L]
9117827 Making electrical components in handle wafers of integrated circuit packagesWithdrawnMay 02, 14Aug 25, 15[H01L]
2015/0228,633 FRONT FACING PIGGYBACK WAFER ASSEMBLYABANDec 15, 14Aug 13, 15[H01L]
2015/0171,027 HIGH YIELD SUBSTRATE ASSEMBLYABANAug 23, 14Jun 18, 15[H01L]
2015/0076,714 MICROELECTRONIC ELEMENT WITH BOND ELEMENTS TO ENCAPSULATION SURFACEABANSep 16, 13Mar 19, 15[H01L]
2015/0056,753 Semiconductor Die Having Fine Pitch Electrical InterconnectsABANSep 08, 14Feb 26, 15[H01L]
2014/0008,676 OPTICAL ENHANCEMENT OF LIGHT EMITTING DEVICESABANJul 03, 12Jan 09, 14[H01L]
2013/0247,372 MULTILAYER WIRING BOARD FOR AN ELECTRONIC DEVICEABANMay 17, 13Sep 26, 13[H05K]
2013/0186,944 MICROELECTRONIC SUBSTRATE OR ELEMENT HAVING CONDUCTIVE PADS AND METAL POSTS JOINED THERETO USING BOND LAYERABANMar 12, 13Jul 25, 13[H01L]
2013/0119,012 INTERCONNECTION ELEMENT FOR ELECTRIC CIRCUITSABANOct 26, 12May 16, 13[H01R]
2013/0119,117 BONDING WEDGEABANNov 02, 12May 16, 13[H01L]
8405196 Chips having rear contacts connected by through vias to front contactsExpiredFeb 26, 08Mar 26, 13[H01L]
2013/0070,437 HYBRID INTERPOSERABANSep 20, 11Mar 21, 13[H01R, H05K]

View all patents..

Top Inventors for This Owner

Upgrade to the Premium Level to View Top Inventors for this Owner. Learn More

We are sorry but your current selection exceeds the maximum number of comparisons () for this membership level. Upgrade to our Level for up to -1 comparisons!

We are sorry but your current selection exceeds the maximum number of portfolios (0) for this membership level. Upgrade to our Level for up to -1 portfolios!.