INVENSAS CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 51087
 
 
 
G11C STATIC STORES 9566
 
 
 
H05K PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS 7479
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 36371
 
 
 
B23K SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM 2461
 
 
 
C25D PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING 1133
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 10135
 
 
 
H01R ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS 10121
 
 
 
H03K PULSE TECHNIQUE 7118
 
 
 
H01K ELECTRIC INCANDESCENT LAMPS 617

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2016/0111,404 METHODS OF FORMING 3-D CIRCUITS WITH INTEGRATED PASSIVE DEVICESDec 21, 15Apr 21, 16[H01L]
2016/0104,689 SEMICONDUCTOR DIE MOUNT BY CONFORMAL DIE COATINGDec 15, 15Apr 14, 16[H01L]
2016/0093,339 STUB MINIMIZATION USING DUPLICATE SETS OF SIGNAL TERMINALSDec 08, 15Mar 31, 16[G11C, H01L]
2016/0093,340 COMPACT MICROELECTRONIC ASSEMBLY HAVING REDUCED SPACING BETWEEN CONTROLLER AND MEMORY PACKAGESSep 25, 14Mar 31, 16[G11C]
2016/0093,563 BGA BALLOUT PARTITION TECHNIQUES FOR SIMPLIFIED LAYOUT IN MOTHERBOARD WITH MULTIPLE POWER SUPPLY RAILSep 26, 14Mar 31, 16[H01L, H05K]
2016/0094,223 ON-CHIP IMPEDANCE NETWORK WITH DIGITAL COARSE AND ANALOG FINE TUNINGAug 18, 15Mar 31, 16[H01C, H03K]
2016/0079,090 CARRIER-LESS SILICON INTERPOSERNov 24, 15Mar 17, 16[H01L, H05K]
2016/0079,093 USE OF UNDERFILL TAPE IN MICROELECTRONIC COMPONENTS, AND MICROELECTRONIC COMPONENTS WITH CAVITIES COUPLED TO THROUGH-SUBSTRATE VIASSep 16, 14Mar 17, 16[H01L]
2016/0079,138 ELECTRONIC STRUCTURES STRENGTHENED BY POROUS AND NON-POROUS LAYERS, AND METHODS OF FABRICATIONSep 14, 15Mar 17, 16[H01L]
2016/0079,169 POLYMER MEMBER BASED INTERCONNECTSep 17, 14Mar 17, 16[H01L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9,323,010 Structures formed using monocrystalline silicon and/or other materials for optical and other applicationsApr 24, 12Apr 26, 16[G02B]
9,324,626 Interposers with circuit modules encapsulated by moldable material in a cavity, and methods of fabricationDec 02, 14Apr 26, 16[H01L]
9,318,467 Multi-die wirebond packages with elongated windowsDec 08, 14Apr 19, 16[H01L]
9,312,175 Surface modified TSV structure and methods thereofDec 20, 12Apr 12, 16[H01L]
9,305,862 Support mounted electrically interconnected die assemblyApr 25, 12Apr 05, 16[H01L]
9,299,398 Retention optimized memory device using predictive data inversionApr 10, 15Mar 29, 16[G11C]
9,299,572 Thermal vias disposed in a substrate without a liner layerMar 07, 14Mar 29, 16[H01L]
9,293,444 Co-support for XFD packagingAug 27, 15Mar 22, 16[H01L]
9,293,641 Inverted optical deviceNov 18, 11Mar 22, 16[H01L]
9,287,195 Stub minimization using duplicate sets of terminals having modulo-x symmetry for wirebond assemblies without windowsFeb 21, 14Mar 15, 16[G11C, H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
9,117,827 Making electrical components in handle wafers of integrated circuit packagesWithdrawnMay 02, 14Aug 25, 15[H01L]
2014/0008,676 OPTICAL ENHANCEMENT OF LIGHT EMITTING DEVICESABANJul 03, 12Jan 09, 14[H01L]
2013/0247,372 MULTILAYER WIRING BOARD FOR AN ELECTRONIC DEVICEABANMay 17, 13Sep 26, 13[H05K]
2013/0186,944 MICROELECTRONIC SUBSTRATE OR ELEMENT HAVING CONDUCTIVE PADS AND METAL POSTS JOINED THERETO USING BOND LAYERABANMar 12, 13Jul 25, 13[H01L]
2013/0119,012 INTERCONNECTION ELEMENT FOR ELECTRIC CIRCUITSABANOct 26, 12May 16, 13[H01R]
2013/0119,117 BONDING WEDGEABANNov 02, 12May 16, 13[H01L]
2013/0070,437 HYBRID INTERPOSERABANSep 20, 11Mar 21, 13[H01R, H05K]
2013/0068,516 HIGH IO SUBSTRATES AND INTERPOSERS WITHOUT VIASABANSep 19, 11Mar 21, 13[H05K]
2013/0037,312 HIGH DENSITY TRACE FORMATION METHOD BY LASER ABLATIONABANAug 10, 11Feb 14, 13[B05D, B32B, H05K]
8,119,516 Bump structure formed from using removable mandrelExpiredNov 04, 08Feb 21, 12[H01L]
8,112,881 Method for manufacturing multilayer wiring boardExpiredSep 29, 05Feb 14, 12[H05K]
2011/0197,655 MULTI-LAYERED CERAMIC MICRO-GAS CHROMATOGRAPH AND METHOD FOR MAKING THE SAMEABANDec 07, 10Aug 18, 11[G01N]
7,856,444 Performing a search using a search parameterExpiredDec 27, 04Dec 21, 10[G06F]
7,843,046 Flat leadless packages and stacked leadless package assembliesExpiredAug 27, 08Nov 30, 10[H01L]
2010/0242,270 Wiring circuit board, manufacturing method for the wiring circuit board, and circuit moduleABANFeb 16, 10Sep 30, 10[H01K]
2010/0071,944 CHIP CAPACITOR EMBEDDED PWBABANDec 17, 07Mar 25, 10[H05K]
2010/0044,860 Microelectronic substrate or element having conductive pads and metal posts joined thereto using bond layerABANJul 30, 09Feb 25, 10[H01L]
2009/0106,488 STATIC RANDOM ACCESS MEMORY (SRAM) COMPATIBLE, HIGH AVAILABILITY MEMORY ARRAY AND METHOD EMPLOYING SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (DRAM) IN CONJUNCTION WITH A DATA CACHE AND SEPARATE READ AND WRITE REGISTERS AND TAG BLOCKSABANOct 20, 08Apr 23, 09[G06F]
2009/0071,707 Multilayer substrate with interconnection vias and method of manufacturing the sameABANAug 13, 08Mar 19, 09[H05K, C25D]
2008/0296,254 Multilayer wiring board for an electronic deviceABANJan 11, 08Dec 04, 08[C23F]

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