INVENSAS CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 59972
 
 
 
G11C STATIC STORES 10571
 
 
 
H05K PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS 8072
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 38390
 
 
 
B23K SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM 2463
 
 
 
C25D PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING 1233
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 10152
 
 
 
H01R ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS 10123
 
 
 
H03K PULSE TECHNIQUE 7125
 
 
 
H01K ELECTRIC INCANDESCENT LAMPS 616

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2017/0069,575 MICROELECTRONIC ASSEMBLY WITH REDISTRIBUTION STRUCTURE FORMED ON CARRIERSep 06, 16Mar 09, 17[H01L]
2017/0069,591 WAFER-LEVEL PACKAGING USING WIRE BOND WIRES IN PLACE OF A REDISTRIBUTION LAYERNov 21, 16Mar 09, 17[H01L]
2017/0069,595 3D-JOINING OF MICROELECTRONIC COMPONENTS WITH CONDUCTIVELY SELF-ADJUSTING ANISOTROPIC MATRIXSep 06, 16Mar 09, 17[H01L]
2017/0069,599 MICROELECTRONIC PACKAGE WITH HORIZONTAL AND VERTICAL INTERCONNECTIONSSep 03, 15Mar 09, 17[H01L]
2017/0062,389 STUB MINIMIZATION USING DUPLICATE SETS OF TERMINALS FOR WIREBOND ASSEMBLIES WITHOUT WINDOWSNov 10, 16Mar 02, 17[G11C, H01L]
2017/0053,857 LOW CTE INTERPOSERJul 25, 16Feb 23, 17[H01L]
2017/0053,886 TALL AND FINE PITCH INTERCONNECTSAug 21, 15Feb 23, 17[H01L]
2017/0047,307 STRUCTURES AND METHODS FOR LOW TEMPERATURE BONDINGOct 27, 16Feb 16, 17[H01L]
2017/0040,237 INTEGRATED CIRCUITS PROTECTED BY SUBSTRATES WITH CAVITIES, AND METHODS OF MANUFACTURESep 14, 16Feb 09, 17[H01L]
2017/0040,268 INTERCONNECTIONS FOR A SUBSTRATE ASSOCIATED WITH A BACKSIDE REVEALOct 18, 16Feb 09, 17[H01L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9595511 Microelectronic packages and assemblies with improved flyby signaling operationMay 12, 16Mar 14, 17[H01L]
9589879 Substrates with through vias with conductive features for connection to integrated circuit elements, and methods for forming through vias in substratesApr 27, 15Mar 07, 17[H01L, H05K]
9583411 Fine pitch BVA using reconstituted wafer with area array accessible for testingJan 17, 14Feb 28, 17[H01L]
9583417 Via structure for signal equalizationMar 12, 14Feb 28, 17[H01L]
9583426 Multi-layer substrates suitable for interconnection between circuit modulesNov 05, 14Feb 28, 17[H01L]
9583456 Multiple bond via arrays of different wire heights on a same substrateAug 31, 15Feb 28, 17[H01L]
9583475 Microelectronic package with stacked microelectronic units and method for manufacture thereofOct 15, 15Feb 28, 17[H01L]
9583671 Quantum efficiency of multiple quantum wellsFeb 23, 15Feb 28, 17[H01S, H01L, B82Y]
9570385 Method for fabrication of interconnection circuitry with electrically conductive features passing through a support and comprising core portions formed using nanoparticle-containing inksJan 22, 15Feb 14, 17[H01L, H05K]
9558964 Method of fabricating low CTE interposer without TSV structureOct 27, 14Jan 31, 17[H01L, H05K]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
9496242 Stackable microelectronic package structuresWithdrawnMar 16, 15Nov 15, 16[B81C, H01L]
9418879 Low cost interposer and method of fabricationWithdrawnMar 14, 13Aug 16, 16[H01L]
2015/0262,902 INTEGRATED CIRCUITS PROTECTED BY SUBSTRATES WITH CAVITIES, AND METHODS OF MANUFACTUREABANMar 14, 14Sep 17, 15[H01L]
9117827 Making electrical components in handle wafers of integrated circuit packagesWithdrawnMay 02, 14Aug 25, 15[H01L]
2015/0076,714 MICROELECTRONIC ELEMENT WITH BOND ELEMENTS TO ENCAPSULATION SURFACEABANSep 16, 13Mar 19, 15[H01L]
2014/0008,676 OPTICAL ENHANCEMENT OF LIGHT EMITTING DEVICESABANJul 03, 12Jan 09, 14[H01L]
2013/0247,372 MULTILAYER WIRING BOARD FOR AN ELECTRONIC DEVICEABANMay 17, 13Sep 26, 13[H05K]
2013/0186,944 MICROELECTRONIC SUBSTRATE OR ELEMENT HAVING CONDUCTIVE PADS AND METAL POSTS JOINED THERETO USING BOND LAYERABANMar 12, 13Jul 25, 13[H01L]
2013/0119,012 INTERCONNECTION ELEMENT FOR ELECTRIC CIRCUITSABANOct 26, 12May 16, 13[H01R]
2013/0119,117 BONDING WEDGEABANNov 02, 12May 16, 13[H01L]
2013/0070,437 HYBRID INTERPOSERABANSep 20, 11Mar 21, 13[H01R, H05K]
2013/0068,516 HIGH IO SUBSTRATES AND INTERPOSERS WITHOUT VIASABANSep 19, 11Mar 21, 13[H05K]
2013/0037,312 HIGH DENSITY TRACE FORMATION METHOD BY LASER ABLATIONABANAug 10, 11Feb 14, 13[B05D, B32B, H05K]
8310036 Chips having rear contacts connected by through vias to front contactsExpiredMay 21, 10Nov 13, 12[H01L]
8119516 Bump structure formed from using removable mandrelExpiredNov 04, 08Feb 21, 12[H01L]
8112881 Method for manufacturing multilayer wiring boardExpiredSep 29, 05Feb 14, 12[H05K]
2011/0197,655 MULTI-LAYERED CERAMIC MICRO-GAS CHROMATOGRAPH AND METHOD FOR MAKING THE SAMEABANDec 07, 10Aug 18, 11[G01N]
7856444 Performing a search using a search parameterExpiredDec 27, 04Dec 21, 10[G06F]
7843046 Flat leadless packages and stacked leadless package assembliesExpiredAug 27, 08Nov 30, 10[H01L]
2010/0242,270 Wiring circuit board, manufacturing method for the wiring circuit board, and circuit moduleABANFeb 16, 10Sep 30, 10[H01K]

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