LATTICE SEMICONDUCTOR CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H03K PULSE TECHNIQUE 30216
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 206238
 
 
 
G11C STATIC STORES 10373
 
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 92178
 
 
 
H04N PICTORIAL COMMUNICATION, e.g. TELEVISION 78151
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 73266
 
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 4668
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 38116
 
 
 
H04B TRANSMISSION 36162
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 3444

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2017/0012,624 Crowbar Current EliminationJul 08, 15Jan 12, 17[H03K]
2017/0005,836 Driving Data of Multiple Protocols Through a Single Set Of PinsJul 29, 16Jan 05, 17[H04L, G09G, H03K]
2016/0373,244 PHASE TRACKING FOR CLOCK AND DATA RECOVERYFeb 27, 15Dec 22, 16[H04L, H03L]
2016/0344,645 DELAY SPECIFIC ROUTINGS FOR PROGRAMMABLE LOGIC DEVICESMay 18, 15Nov 24, 16[H04L]
2016/0335,383 AREA-EFFICIENT MEMORY MAPPING TECHNIQUES FOR PROGRAMMABLE LOGIC DEVICESMay 15, 15Nov 17, 16[G06F]
2016/0320,448 Programmable Circuits for Correcting Scan-Test Circuitry Defects in Integrated Circuit DesignsApr 28, 15Nov 03, 16[G01R]
2016/0321,385 CLOCK PLACEMENT FOR PROGRAMMABLE LOGIC DEVICESApr 28, 15Nov 03, 16[G06F]
2016/0295,221 Port Processor Capable of Performing Authentication for Multiple Source DevicesApr 01, 15Oct 06, 16[H04N]
2016/0285,483 Enhanced Echo Cancellation in Full-Duplex CommunicationJan 05, 15Sep 29, 16[H04L, H04B]
2016/0277,212 FULL DUPLEX RADIO IN WIRELESS TUNNELING SYSTEMMar 17, 16Sep 22, 16[H04L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9,549,015 Communication of multimedia data streams over multiple communication lanesApr 15, 14Jan 17, 17[H04N, H04L]
9,542,993 Leakage-current abatement circuitry for memory arraysOct 19, 15Jan 10, 17[G01R, H04L, G11C, H01L, H03M]
9,543,950 High speed complementary NMOS LUT logicJan 30, 15Jan 10, 17[H03K]
9,535,445 Transistor matching for generation of precise current ratiosApr 04, 14Jan 03, 17[G05F]
9,537,308 ESD protection using shared RC triggerDec 03, 13Jan 03, 17[H02H, H01L]
9,537,644 Transmitting multiple differential signals over a reduced number of physical channelsFeb 21, 13Jan 03, 17[H04L, G09G]
9,537,646 Retry disparity for control channel of a multimedia communication linkAug 27, 14Jan 03, 17[H04L]
9,530,486 Adaptive technique for adjusting signal development across bit lines for read operation robustness in memory circuitsOct 07, 15Dec 27, 16[G11C]
9,531,447 Collaborative channel sounding in multi-antenna systemsDec 20, 12Dec 27, 16[H04L, H04B]
9,531,986 Bitmap device identification in a wireless communication systemJun 30, 08Dec 27, 16[H04N, H04L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2016/0134,264 META-STABILITY PREVENTION FOR OSCILLATORSABANNov 07, 14May 12, 16[H03K]
2016/0118,987 Level Shifter With Low Static Power DissipationABANOct 28, 14Apr 28, 16[H03K]
9,324,293 Conversion of multimedia data streams for use by connected devicesWithdrawnAug 04, 11Apr 26, 16[H04N, H04L, G09G]
2016/0091,669 Electrical Connector with Optical ChannelABANSep 30, 14Mar 31, 16[H01R, G02B]
2016/0026,745 CLOCK TO OUT PATH OPTIMIZATIONABANJul 23, 14Jan 28, 16[G06F]
2015/0310,933 Configurable Test Address And Data Generation For Multimode Memory Built-In Self-TestingABANSep 10, 14Oct 29, 15[G11C]
2015/0178,436 CLOCK ASSIGNMENTS FOR PROGRAMMABLE LOGIC DEVICEABANDec 20, 13Jun 25, 15[G06F]
2014/0193,165 ELECTRONIC ALIGNMENT OF OPTICAL SIGNALSABANMar 15, 13Jul 10, 14[H04B]
2014/0168,514 Video Frame SynchronizationABANFeb 19, 14Jun 19, 14[H04N]
2014/0152,891 Method and Apparatus for Reducing Digital Video Image DataABANJan 10, 13Jun 05, 14[H04N]
2014/0009,194 PHASE LOCKED LOOP CIRCUIT WITH SELECTABLE FEEDBACK PATHSABANSep 09, 13Jan 09, 14[H03L]
2013/0287,100 MECHANISM FOR FACILITATING COST-EFFICIENT AND LOW-LATENCY ENCODING OF VIDEO STREAMSABANApr 30, 12Oct 31, 13[H04N]
2013/0191,570 MULTI-MEDIA USB DATA TRANSFER OVER DIGITAL INTERACTION INTERFACE FOR VIDEO AND AUDIO (DiiVA)ABANJan 12, 11Jul 25, 13[G06F]
2013/0162,901 RINGING SUPPRESSION IN VIDEO SCALERSABANDec 22, 11Jun 27, 13[H04N]
2012/0158,346 IDDQ TESTING OF CMOS DEVICESABANNov 16, 11Jun 21, 12[G01R, G06F]
2011/0157,473 METHOD, APPARATUS, AND SYSTEM FOR SIMULTANEOUSLY PREVIEWING CONTENTS FROM MULTIPLE PROTECTED SOURCESABANDec 30, 09Jun 30, 11[H04N]
2011/0149,032 TRANSMISSION AND HANDLING OF THREE-DIMENSIONAL VIDEO CONTENTABANDec 13, 10Jun 23, 11[H04N]
2009/0327,572 EXCHANGING INFORMATION BETWEEN COMPONENTS COUPLED WITH AN A I2C BUS VIA SEPARATE BANKSABANJun 30, 08Dec 31, 09[G06F]
2009/0086,695 Mechanism for communication with multiple wireless video area networksABANJun 30, 08Apr 02, 09[H04W]
2009/0037,160 METHOD AND APPARATUS TO SERVE IBIS DATAABANJul 31, 07Feb 05, 09[G06F]

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