MARVELL ISRAEL (M.I.S.L.) LTD.

Patent Owner

Watch Compare Add to Portfolio 5Status Updates

Stats

Details

Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 123162
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 109332
 
 
 
H03K PULSE TECHNIQUE 28104
 
 
 
G11C STATIC STORES 22131
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 20143
 
 
 
H04J MULTIPLEX COMMUNICATION 17107
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 1660
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 11340
 
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 10103
 
 
 
H04B TRANSMISSION 6203

Top Patents (by citation)

Upgrade to the Premium Level to View Top Patents for this Owner. Learn More

Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0001,954 LOCKING STRUCTURESep 07, 16Jan 04, 18[B62K]
2017/0133,271 Method to produce a semiconductor wafer for versatile productsNov 07, 16May 11, 17[G06F, H01L]
2016/0334,832 CRITICAL PATHS ACCOMMODATION WITH FREQUENCY VARIABLE CLOCK GENERATORMay 11, 16Nov 17, 16[G06F]
2016/0328,158 MULTI-BANK MEMORY WITH MULTIPLE READ PORTS AND MULTIPLE WRITE PORTS PER CYCLEApr 17, 16Nov 10, 16[G06F]
2016/0320,989 MULTI-BANK MEMORY WITH ONE READ PORT AND ONE OR MORE WRITE PORTS PER CYCLEApr 07, 16Nov 03, 16[G06F]
2016/0321,184 Multiple Read and Write Port MemoryApr 29, 16Nov 03, 16[G06F]
2016/0162,426 OPTIMAL SAMPLING OF DATA-BUS SIGNALS USING CONFIGURABLE INDIVIDUAL TIME DELAYSDec 03, 15Jun 09, 16[G06F]
2016/0055,118 PACKET BUFFER WITH DYNAMIC BYPASSAug 25, 15Feb 25, 16[H04L, G06F]
2015/0215,226 Device and Method for Packet Processing with Memories Having Different LatenciesJan 23, 15Jul 30, 15[H04L]
2015/0177,773 Power Supply Noise Reduction Circuit and Power Supply Noise Reduction MethodDec 18, 14Jun 25, 15[G05F]

View all Publication..

Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9864546 FIFO-based operations for redundant array of independent disks (RAID) deviceMar 03, 16Jan 09, 18[G06F]
9864713 Optimal sampling of data-bus signals using configurable individual time delaysDec 03, 15Jan 09, 18[H04L, G06F]
9865503 Method to produce a semiconductor wafer for versatile productsNov 07, 16Jan 09, 18[G06F, H01L]
9866339 Method and apparatus for securing clock synchronization in a networkOct 23, 14Jan 09, 18[H04L, H04J]
9838341 Methods and apparatus for memory resource management in a network deviceJan 07, 15Dec 05, 17[H04L]
9838500 Network device and method for packet processingMar 10, 15Dec 05, 17[H04L, G06F]
9824744 High-speed differential interface circuit with fast setup timeJan 30, 17Nov 21, 17[H03F, G11C]
9813336 Device and method for increasing packet processing rate in a network deviceDec 17, 14Nov 07, 17[H04L, H04J]
9805822 Built-in self-test for adaptive delay-locked loopJan 23, 17Oct 31, 17[G11C, H03L]
9807027 Maintaining packet order in a multi processor network deviceFeb 29, 16Oct 31, 17[H04L]

View all patents..

Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
9197594 Scaling of virtual machine addresses in datacentersWithdrawnJul 13, 12Nov 24, 15[H04L, G06F]
2011/0270,952 COMPUTER IN A DONGLEABANApr 20, 11Nov 03, 11[G06F]
2011/0228,674 PACKET PROCESSING OPTIMIZATIONABANMar 01, 11Sep 22, 11[H04L]
6678278 Bit clearing mechanism for an empty listExpiredMay 22, 01Jan 13, 04[H04L, G06F]

Top Inventors for This Owner

Upgrade to the Premium Level to View Top Inventors for this Owner. Learn More

We are sorry but your current selection exceeds the maximum number of comparisons () for this membership level. Upgrade to our Level for up to -1 comparisons!

We are sorry but your current selection exceeds the maximum number of portfolios (0) for this membership level. Upgrade to our Level for up to -1 portfolios!.