MENTOR GRAPHICS CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 82095
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 20333
 
 
 
G11C STATIC STORES 39111
 
 
 
H03K PULSE TECHNIQUE 29104
 
 
 
G03F PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR 2878
 
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 22260
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 14340
 
 
 
G06K RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS 9196
 
 
 
G06T IMAGE DATA PROCESSING OR GENERATION, IN GENERAL 7130
 
 
 
G06G ANALOGUE COMPUTERS 646

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0032,357 DEBUG ENVIRONMENT FOR A MULTI USER HARDWARE ASSISTED VERIFICATION SYSTEMJul 10, 17Feb 01, 18[G06F]
2018/0017,622 CONTINUOUS APPLICATION AND DECOMPRESSION OF TEST PATTERNS AND SELECTIVE COMPACTION OF TEST RESPONSESMay 30, 17Jan 18, 18[G01R]
2018/0011,956 Data Injection In Emulation Without RebootingJul 11, 16Jan 11, 18[G06F]
2018/0004,887 Homotopy Optimized Parasitic ExtractionJul 01, 16Jan 04, 18[G06F]
2018/0004,888 Pattern Matching Using Edge-Driven Dissected RectanglesJul 01, 16Jan 04, 18[G06T, G06F]
2017/0351,795 VIRTUAL ETHERNET MUTABLE PORT GROUP TRANSACTORMay 12, 17Dec 07, 17[G06F]
2017/0337,309 Target Capture And Replay In EmulationAug 04, 17Nov 23, 17[H04L, G06F]
2017/0328,952 Wide-Range Clock Signal Generation For Speed Grading Of Logic CoresMay 11, 17Nov 16, 17[G01R, H03L]
2017/0329,997 SECURE MECHANISM FOR FINITE PROVISIONING OF AN INTEGRATED CIRCUITMay 11, 16Nov 16, 17[G06F]
2017/0315,603 POWER PROFILING FOR EMBEDDED SYSTEM DESIGNFeb 13, 17Nov 02, 17[G06F]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9881113 Layout synthesis of a three-dimensional mechanical system designJun 17, 15Jan 30, 18[G06F]
9874606 Selective per-cycle masking of scan chains for system level testJun 21, 16Jan 23, 18[G01R, G06F]
9857421 Dynamic design partitioning for diagnosisMay 04, 16Jan 02, 18[G01R, G06F]
9857693 Lithography model calibration via cache-based niching genetic algorithmsJan 08, 17Jan 02, 18[G03B, G03F, G12B]
9836043 Harness sub-assembly rationalizationJan 29, 15Dec 05, 17[G05B, G06Q]
9836556 Optical proximity correction for directed-self-assembly guiding patternsMar 30, 16Dec 05, 17[G03F, G06F]
9836569 Leakage reduction using stress-enhancing filler cellsMar 30, 16Dec 05, 17[G06F, H01L]
9824169 Regression signature for statistical functional coverageJan 30, 14Nov 21, 17[G01R, G06F]
9817932 Recognizing and utilizing circuit topology in an electronic circuit designJan 27, 16Nov 14, 17[G06F]
9817934 Multi-FPGA prototyping of an ASIC circuitJul 26, 16Nov 14, 17[G06F]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2017/0132,434 MEASURE VARIATION TOLERANT PHYSICAL UNCLONABLE FUNCTION DEVICEABANNov 24, 15May 11, 17[G06F]
2016/0140,278 Modeling Photoresist Shrinkage Effects In LithographyABANJan 25, 16May 19, 16[G06F]
9009643 Density-based integrated circuit design adjustmentWithdrawnAug 19, 13Apr 14, 15[G06F]
8984460 Defect injection for transistor-level fault simulationWithdrawnAug 22, 13Mar 17, 15[G06F]
2015/0067,621 Logic-Driven Layout Pattern AnalysisABANSep 05, 13Mar 05, 15[G06F]
2014/0337,810 MODULAR PLATFORM FOR INTEGRATED CIRCUIT DESIGN ANALYSIS AND VERIFICATIONABANDec 16, 13Nov 13, 14[G06F]
2014/0330,529 IDENTIFICATION OF FLUID FLOW BOTTLENECKSABANMar 26, 14Nov 06, 14[G01F]
2014/0246,705 Programmable Leakage Test For Interconnects In Stacked DesignsABANMar 03, 14Sep 04, 14[G06F]
2014/0212,793 Multiresolution Mask WritingABANAug 14, 13Jul 31, 14[G03F]
2014/0201,694 Wrap Based Fill In Layout DesignsABANJan 15, 14Jul 17, 14[G06F]
2014/0040,848 Controllable Turn-Around Time For Post Tape-Out FlowABANFeb 14, 13Feb 06, 14[G06F]
2014/0040,850 ManufacturabilityABANJan 22, 13Feb 06, 14[G06F]
2013/0318,487 Programmable Circuit Characteristics AnalysisABANMay 23, 13Nov 28, 13[G06F]
2013/0318,531 Domain Bounding For Symmetric Multiprocessing SystemsABANFeb 19, 13Nov 28, 13[G06F]
2013/0305,111 Circuit And Method For Simultaneously Measuring Multiple Changes In DelayABANJul 15, 13Nov 14, 13[G01R]
2013/0263,074 Analog Rule Check WaiverABANMay 23, 13Oct 03, 13[G06F]
2013/0254,581 Power Profiling For Embedded System DesignABANMay 15, 13Sep 26, 13[G06F]
2013/0246,987 Coexistence Of Multiple Verification Component Types In A Hardware Verification FrameworkABANFeb 06, 13Sep 19, 13[G06F]
2013/0239,124 Event Queue Management For Embedded SystemsABANJan 22, 13Sep 12, 13[G06F]
2013/0227,500 Calculation System For Inverse MasksABANSep 19, 12Aug 29, 13[G06F]

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