MOSAID TECHNOLOGIES INCORPORATED

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Technologies

Intl Class Technology # of Patents Rank
 
 
 
G11C STATIC STORES 33322
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 30381
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 146168
 
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 8588
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 4532
 
 
 
H03K PULSE TECHNIQUE 4166
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 3395
 
 
 
H04M TELEPHONIC COMMUNICATION 29104
 
 
 
H04J MULTIPLEX COMMUNICATION 2877
 
 
 
C23C COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL 2142

Top Patents (by citation)

Patent # Title Filing Date Issue Date Intl Class Cited #
5,331,637 Multicast routing using core based treesJul 30, 93Jul 19, 94[H04J, H04L]254
5,611,049 System for accessing distributed data cache channel at each network node to pass requests and dataNov 28, 94Mar 11, 97[G06F]240
5,650,770 Self-locating remote monitoring systemsOct 23, 95Jul 22, 97[G08B]217
6,085,234 Remote file services network-infrastructure cacheJul 23, 98Jul 04, 00[G06F]209
6,330,572 Hierarchical data storage managementJul 15, 99Dec 11, 01[G06F]184
6,175,550 Orthogonal frequency division multiplexing system with dynamically scalable operating parameters and method thereofApr 01, 97Jan 16, 01[H04J]176
6,510,503 High bandwidth memory interfaceOct 30, 98Jan 21, 03[G06F]168
6,463,059 Direct memory access execution engine with indirect addressing of circular queues in addition to direct memory addressingDec 04, 98Oct 08, 02[H04L]164
5,963,130 Self-locating remote monitoring systemsJul 06, 98Oct 05, 99[G08B]163
5,706,428 Multirate wireless data communication systemMar 14, 96Jan 06, 98[H04L, H04Q]158

Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2013/0107,443 FLASH MEMORY MODULE AND MEMORY SUBSYSTEMOct 31, 12May 02, 13[G06F]
2013/0102,111 STACKED SEMICONDUCTOR DEVICES INCLUDING A MASTER DEVICEDec 13, 12Apr 25, 13[H01L]
2013/0094,271 CONNECTION OF MULTIPLE SEMICONDUCTOR MEMORY DEVICES WITH CHIP ENABLE FUNCTIONAug 17, 12Apr 18, 13[G11C]
2013/0083,615 REDUCED NOISE DRAM SENSINGOct 04, 12Apr 04, 13[G11C]
2013/0086,334 SERIALLY CONNECTED MEMORY HAVING SUBDIVIDED DATA INTERFACEApr 26, 11Apr 04, 13[G06F]
2013/0080,730 FLASH MEMORY SYSTEMApr 25, 12Mar 28, 13[G06F]
2013/0068,509 METHOD AND APPARATUS FOR CONNECTING INLAID CHIP INTO PRINTED CIRCUIT BOARDSep 18, 12Mar 21, 13[H05K]
2013/0070,539 DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTIONOct 12, 12Mar 21, 13[G11C]
2013/0070,540 VOLTAGE REGULATION FOR 3D PACKAGES AND METHOD OF MANUFACTURING SAMESep 19, 11Mar 21, 13[G11C, H01L]
2013/0070,547 MEMORY SYSTEM WITH A LAYER COMPRISING A DEDICATED REDUNDANCY AREASep 17, 12Mar 21, 13[G11C]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8,432,729 Phase-change memory with multiple polarity bits having enhanced endurance and error toleranceApr 13, 11Apr 30, 13[G11C]
8,432,767 Clock mode determination in a memory systemJan 13, 11Apr 30, 13[G11C]
8,433,874 Address assignment and type recognition of serially interconnected memory devices of mixed typeJun 29, 07Apr 30, 13[G06F]
8,427,897 Memory with output controlMay 03, 12Apr 23, 13[G11C]
8,429,495 Error detection and correction codes for channels and memories with incomplete error characteristicsOct 19, 10Apr 23, 13[G11C]
8,421,229 Semiconductor device having metal lines with slitsDec 01, 10Apr 16, 13[H01L]
8,416,633 SRAM leakage reduction circuitNov 08, 11Apr 09, 13[G11C]
8,411,812 Wide frequency range delay locked loopJun 14, 12Apr 02, 13[H04L]
8,412,968 Circuit, system and method for selectively turning off internal clock driversJan 06, 10Apr 02, 13[G06F]
8,406,070 Single-strobe operation of memory devicesJan 05, 11Mar 26, 13[G11C]

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Top Inventors for This Owner

Inventor Name Address # of Patent/Pub
Kim Jin-Ki
Kanata, CA
212
Binder Yehuda
Hod Hasharon, IL
192
Pyeon Hong Beom
Kanata, CA
178
OH HakJune
Kanata, CA
120
Gillingham Peter B
Kanata, CA
60
Foss Richard C
Kirkcaldy Fife, GB
51
Millar Bruce
Stittsville, CA
44
Gillingham Peter
Kanata, CA
40
Lines Valerie L
Ottawa, CA
37
Haerle Dieter
Kanata, CA
34