NANYA TECHNOLOGY CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 62577
 
  
 
G11C STATIC STORES 11168
 
  
 
G03F PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR 4366
 
  
 
H03K PULSE TECHNIQUE 29102
 
  
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 25134
 
  
 
G06F ELECTRIC DIGITAL DATA PROCESSING 20427
 
  
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 1783
 
  
 
B24B MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING 1056
 
  
 
G03B APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR 1087
 
  
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 1070

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0015,569 CHIP AND METHOD OF MANUFACTURING CHIPSJul 18, 16Jan 18, 18[H01L, B23K]
2017/0162,411 TRAYDec 03, 15Jun 08, 17[H01L]
2017/0148,503 DYNAMIC RANDOM ACCESS MEMORY CIRCUIT AND VOLTAGE CONTROLLING METHOD THEREOFNov 23, 15May 25, 17[G11C]
2017/0133,230 SEMICONDUCTOR DEVICE HAVING VERTICAL SILICON PILLAR TRANSISTORJan 25, 17May 11, 17[H01L]
2017/0018,305 ELECTRONIC APPARATUS APPLYING UNIFIED NON-VOLATILE MEMORY AND UNIFIED NON-VOLATILE MEMORY CONTROLLING METHODJul 14, 15Jan 19, 17[G11C]
2016/0299,843 UNIFIED NON-VOLATILE MEMORY AND ELECTRONIC APPARATUS APPLYING THE NON-VOLATILE MEMORYApr 08, 15Oct 13, 16[G06F, G11C]

Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9922920 Semiconductor package and method for fabricating the sameSep 19, 16Mar 20, 18[H01L]
9905549 Semiconductor apparatus and method for preparing the sameFeb 16, 17Feb 27, 18[H01L]
9892985 Semiconductor device and method for manufacturing the sameJul 18, 16Feb 13, 18[H01L]
9893035 Stacked package structure and manufacturing method thereofNov 07, 16Feb 13, 18[H01L]
9893037 Multi-chip semiconductor package, vertically-stacked devices and manufacturing thereofApr 20, 17Feb 13, 18[H01L]
9881867 Conductive connection structure having stress buffer layerJan 19, 17Jan 30, 18[H01L]
9858997 Electronic apparatus applying unified non-volatile memory and unified non-volatile memory controlling methodJul 14, 15Jan 02, 18[G11C]
9831155 Chip package having tilted through silicon viaMar 11, 16Nov 28, 17[H01L]
9831303 Capacitor structure and process for fabricating the sameNov 02, 12Nov 28, 17[H01L, H01G]
9812414 Chip package and a manufacturing method thereofJun 17, 16Nov 07, 17[H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2016/0054,382 METHOD FOR CHECKING RESULT OF CHIP PROBING TEST AND CHIP THEREOFAbandonedAug 22, 14Feb 25, 16[G01R]
2016/0013,191 CAPACITOR AND METHOD OF MANUFACTURING THE SAMEAbandonedSep 21, 15Jan 14, 16[H01L]
2015/0203,753 LIQUID ETCHANT COMPOSITION, AND ETCHING PROCESS IN CAPACITOR PROCESS OF DRAM USING THE SAMEAbandonedJan 17, 14Jul 23, 15[C09K, H01L]
2015/0206,789 METHOD OF MODIFYING POLYSILICON LAYER THROUGH NITROGEN INCORPORATION FOR ISOLATION STRUCTUREAbandonedJan 17, 14Jul 23, 15[H01L]
2015/0123,195 RECESSED CHANNEL ACCESS TRANSISTOR DEVICE AND FABRICATION METHOD THEREOFAbandonedNov 04, 13May 07, 15[H01L]
2015/0048,373 METHOD AND LAYOUT FOR DETECTING DIE CRACKSAbandonedOct 29, 14Feb 19, 15[H01L, G01R]
2015/0041,182 PACKAGE SUBSTRATE AND CHIP PACKAGE USING THE SAMEAbandonedOct 27, 14Feb 12, 15[H05K]
2015/0008,431 METHOD AND LAYOUT FOR DETECTING DIE CRACKSAbandonedJul 04, 13Jan 08, 15[H01L, G01R]
2014/0349,461 METHOD FOR USING METAL BILAYERAbandonedAug 13, 14Nov 27, 14[H01L]
2014/0264,640 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEAbandonedMar 18, 13Sep 18, 14[H01L]
2014/0185,182 SEMICONDUCTOR DEVICE WITH RUTILE TITANIUM OXIDE DIELECTRIC FILMAbandonedJan 02, 13Jul 03, 14[H01G]
2014/0131,835 SEMICONDUCTOR DEVICE WITH RUTILE TITANIUM OXIDE DIELECTRIC FILMAbandonedNov 12, 12May 15, 14[H01L]
2014/0118,978 PACKAGE SUBSTRATE AND CHIP PACKAGE USING THE SAMEAbandonedOct 25, 12May 01, 14[H05K, B32B]
2014/0070,359 SEMICONDUCTOR MEMORY ARRAY STRUCTUREAbandonedSep 13, 12Mar 13, 14[H01L]
2014/0054,756 ANTI SPACER PROCESS AND SEMICONDUCTOR STRUCTURE GENERATED BY THE ANTI SPACER PROCESSAbandonedAug 23, 12Feb 27, 14[H01L]
2014/0042,548 DRAM STRUCTURE WITH BURIED WORD LINES AND FABRICATION THEREOF, AND IC STRUCTURE AND FABRICATION THEREOFAbandonedOct 07, 13Feb 13, 14[H01L]
2014/0036,565 MEMORY DEVICE AND METHOD OF MANUFACTURING MEMORY STRUCTUREAbandonedAug 02, 12Feb 06, 14[H01L, G11C]
2014/0008,117 CONNECTING STRUCTURE OF CIRCUIT BOARDAbandonedJul 03, 12Jan 09, 14[H05K]
2014/0001,633 COPPER INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THEREOFAbandonedJun 27, 12Jan 02, 14[H01L]
2013/0341,807 SEMICONDUCTOR PACKAGE STRUCTUREAbandonedJun 25, 12Dec 26, 13[H01L]

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