NANYA TECHNOLOGY CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 61873
 
 
 
G11C STATIC STORES 11170
 
 
 
G03F PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR 4362
 
 
 
H03K PULSE TECHNIQUE 29100
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 25134
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 20419
 
 
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 1780
 
 
 
B24B MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING 1055
 
 
 
G03B APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR 1086
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 1066

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2017/0263,536 CHIP PACKAGE HAVING TILTED THROUGH SILICON VIAMar 11, 16Sep 14, 17[H01L]
2017/0162,411 TRAYDec 03, 15Jun 08, 17[H01L]
2017/0148,503 DYNAMIC RANDOM ACCESS MEMORY CIRCUIT AND VOLTAGE CONTROLLING METHOD THEREOFNov 23, 15May 25, 17[G11C]
2017/0133,230 SEMICONDUCTOR DEVICE HAVING VERTICAL SILICON PILLAR TRANSISTORJan 25, 17May 11, 17[H01L]
2017/0018,305 ELECTRONIC APPARATUS APPLYING UNIFIED NON-VOLATILE MEMORY AND UNIFIED NON-VOLATILE MEMORY CONTROLLING METHODJul 14, 15Jan 19, 17[G11C]
2016/0299,843 UNIFIED NON-VOLATILE MEMORY AND ELECTRONIC APPARATUS APPLYING THE NON-VOLATILE MEMORYApr 08, 15Oct 13, 16[G11C, G06F]
2015/0206,789 METHOD OF MODIFYING POLYSILICON LAYER THROUGH NITROGEN INCORPORATION FOR ISOLATION STRUCTUREJan 17, 14Jul 23, 15[H01L]
2014/0126,105 CAPACITOR STRUCTURE AND PROCESS FOR FABRICATING THE SAMENov 02, 12May 08, 14[H01G, H01L]
2014/0042,548 DRAM STRUCTURE WITH BURIED WORD LINES AND FABRICATION THEREOF, AND IC STRUCTURE AND FABRICATION THEREOFOct 07, 13Feb 13, 14[H01L]

Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9812414 Chip package and a manufacturing method thereofJun 17, 16Nov 07, 17[H01L]
9799391 Dram circuit, redundant refresh circuit and refresh methodNov 21, 16Oct 24, 17[G11C, G06F]
9799624 Wire bonding method and wire bonding structureAug 17, 16Oct 24, 17[H01L]
9786593 Semiconductor device and method for forming the sameApr 11, 16Oct 10, 17[H01L]
9779957 Method of manufacturing independent depth-controlled shallow trench isolationJul 31, 14Oct 03, 17[H01L]
9761535 Interposer, semiconductor package with the same and method for preparing a semiconductor package with the sameJun 27, 16Sep 12, 17[H01L]
9711442 Semiconductor structureAug 24, 16Jul 18, 17[H01L]
9704818 Semiconductor structure and manufacturing method thereofJul 06, 16Jul 11, 17[H01L]
9691773 Silicon buried digit line access device and method of forming the sameNov 01, 13Jun 27, 17[H01L]
9664852 Optical waveguide having several dielectric layers and at least one metal cladding layerSep 30, 16May 30, 17[G02B, H01P]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2016/0054,382 METHOD FOR CHECKING RESULT OF CHIP PROBING TEST AND CHIP THEREOFABANAug 22, 14Feb 25, 16[G01R]
2016/0013,191 CAPACITOR AND METHOD OF MANUFACTURING THE SAMEABANSep 21, 15Jan 14, 16[H01L]
2015/0203,753 LIQUID ETCHANT COMPOSITION, AND ETCHING PROCESS IN CAPACITOR PROCESS OF DRAM USING THE SAMEABANJan 17, 14Jul 23, 15[C09K, H01L]
2015/0123,195 RECESSED CHANNEL ACCESS TRANSISTOR DEVICE AND FABRICATION METHOD THEREOFABANNov 04, 13May 07, 15[H01L]
2015/0048,373 METHOD AND LAYOUT FOR DETECTING DIE CRACKSABANOct 29, 14Feb 19, 15[G01R, H01L]
2015/0041,182 PACKAGE SUBSTRATE AND CHIP PACKAGE USING THE SAMEABANOct 27, 14Feb 12, 15[H05K]
2015/0008,431 METHOD AND LAYOUT FOR DETECTING DIE CRACKSABANJul 04, 13Jan 08, 15[G01R, H01L]
2014/0349,461 METHOD FOR USING METAL BILAYERABANAug 13, 14Nov 27, 14[H01L]
2014/0264,640 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEABANMar 18, 13Sep 18, 14[H01L]
2014/0185,182 SEMICONDUCTOR DEVICE WITH RUTILE TITANIUM OXIDE DIELECTRIC FILMABANJan 02, 13Jul 03, 14[H01G]
2014/0131,835 SEMICONDUCTOR DEVICE WITH RUTILE TITANIUM OXIDE DIELECTRIC FILMABANNov 12, 12May 15, 14[H01L]
2014/0118,978 PACKAGE SUBSTRATE AND CHIP PACKAGE USING THE SAMEABANOct 25, 12May 01, 14[B32B, H05K]
2014/0070,359 SEMICONDUCTOR MEMORY ARRAY STRUCTUREABANSep 13, 12Mar 13, 14[H01L]
2014/0054,756 ANTI SPACER PROCESS AND SEMICONDUCTOR STRUCTURE GENERATED BY THE ANTI SPACER PROCESSABANAug 23, 12Feb 27, 14[H01L]
2014/0036,565 MEMORY DEVICE AND METHOD OF MANUFACTURING MEMORY STRUCTUREABANAug 02, 12Feb 06, 14[G11C, H01L]
2014/0008,117 CONNECTING STRUCTURE OF CIRCUIT BOARDABANJul 03, 12Jan 09, 14[H05K]
2014/0001,633 COPPER INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THEREOFABANJun 27, 12Jan 02, 14[H01L]
2013/0341,807 SEMICONDUCTOR PACKAGE STRUCTUREABANJun 25, 12Dec 26, 13[H01L]
2013/0320,540 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEABANJun 04, 12Dec 05, 13[H01L]
2013/0299,884 MEMORY DEVICE AND METHOD FOR MANUFACTURING MEMORY DEVICEABANMay 10, 12Nov 14, 13[H01L]

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