NATIONAL SEMICONDUCTOR CORPORATION

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Technologies

Intl Class Technology # of Patents Rank
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 1141 27
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 364 98
 
 
H03K PULSE TECHNIQUE 340 11
 
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 286 3
 
 
H03F AMPLIFIERS 214 2
 
 
G11C STATIC STORES 155 42
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 134 21
 
 
H04B TRANSMISSION 110 71
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 103 11
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 99 44
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Top Patents (by citation)

Patent # Title Filing Date Issue Date Intl Class Cited #
5,422,435 Stacked multi-chip modules and method of manufacturing May 22, 92 Jun 06, 95 [H01L] 284
6,012,102 System using machine-readable printed symbols created from encoded data resource specifiers to establish connection to data resource on data communications network Apr 02, 96 Jan 04, 00 [G06F] 263
5,495,398 Stacked multi-chip modules and method of manufacturing Jun 05, 95 Feb 27, 96 [H05K] 216
5,764,736 Method for switching between a data communication session and a voice communication session Jul 20, 95 Jun 09, 98 [H04M] 208
5,784,636 Reconfigurable computer architecture for use in signal processing applications May 28, 96 Jul 21, 98 [G06F] 202
5,336,950 Configuration features in a configurable logic array Feb 08, 93 Aug 09, 94 [H03K] 191
5,533,123 Programmable distributed personal security Jun 28, 94 Jul 02, 96 [H04L] 189
5,502,289 Stacked multi-chip modules and method of manufacturing Mar 13, 95 Mar 26, 96 [H05K] 188
5,783,870 Method for connecting packages of a stacked ball grid array structure Nov 14, 95 Jul 21, 98 [H01L] 155
6,130,473 Lead frame chip scale package Apr 02, 98 Oct 10, 00 [H01L] 153
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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2013/0093,478 DIFFERENTIATOR BASED SPREAD SPECTRUM MODULATOR Oct 13, 11 Apr 18, 13 [H03L]
2013/0087,901 DESIGN FOR EXPOSED DIE PACKAGE Oct 10, 11 Apr 11, 13 [B29C, H01L]
2013/0088,171 LED DRIVER HAVING NON-LINEAR COMPENSATION Oct 06, 11 Apr 11, 13 [H05B]
2013/0070,209 METHOD AND SYSTEM FOR DYNAMIC FEED-FORWARD POWER CONTROL IN A PROJECTOR SYSTEM Nov 03, 08 Mar 21, 13 [G03B, G09G]
2013/0062,725 SYSTEM AND METHOD OF GALVANIC ISOLATION IN DIGITAL SIGNAL TRANSFER INTEGRATED CIRCUITS UTILIZING CONDUCTIVITY MODULATION OF SEMICONDUCTOR SUBSTRATE Sep 12, 11 Mar 14, 13 [H01L]
2013/0063,182 Small Highly Accurate Battery Temperature Monitoring Circuit Sep 12, 11 Mar 14, 13 [H03K]
2013/0049,749 Semiconductor Fluxgate Magnetometer Aug 26, 11 Feb 28, 13 [G01R, H01L]
2013/0049,832 CLOCK GENERATOR WITH DUTY CYCLE CONTROL AND METHOD Aug 23, 11 Feb 28, 13 [H03L]
2013/0049,916 SEMICONDUCTOR STRUCTURE WITH GALVANICALLY-ISOLATED SIGNAL AND POWER PATHS Aug 26, 11 Feb 28, 13 [H01F, H01L]
2013/0050,003 SIGMA-DELTA ANALOG TO DIGITAL CONVERTER Aug 24, 11 Feb 28, 13 [H03M]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8,427,209 Sampling phase lock loop (PLL) with low power clock buffer Oct 17, 12 Apr 23, 13 [H03L]
8,420,497 Semiconducture structure and method of forming the semiconductor structure that provides two individual resistors or a capacitor Jun 01, 12 Apr 16, 13 [H01L]
8,421,400 Solar-powered battery charger and related system and method Oct 30, 09 Apr 16, 13 [H02J]
8,422,970 RMS power detection with signal-independent dynamics and related apparatus, system, and method Aug 24, 09 Apr 16, 13 [G06F]
8,423,919 Universal two-input logic gate that is configurable and connectable in an integrated circuit by a single mask layer adjustment Aug 10, 10 Apr 16, 13 [G06F]
8,415,752 Configuration and fabrication of semiconductor structure having asymmetric field-effect transistor with tailored pocket portion along source/drain zone Jan 11, 12 Apr 09, 13 [H01L]
8,415,933 Buck or boost DC-DC converter Dec 17, 10 Apr 09, 13 [G05F]
8,416,112 Circuitry and method for digital to analog current signal conversion with phase interpolation Jul 21, 11 Apr 09, 13 [H03M]
8,416,173 Display system with frame buffer and power saving sequence Sep 05, 06 Apr 09, 13 [G09G]
8,416,547 Short circuit protection with reduced offset voltage Nov 29, 06 Apr 09, 13 [H02H]

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Top Inventors for This Owner

Inventor Name Address Patent #
Hopper Peter J
San Jose, US
247
Vashchenko Vladislav
Fremont, US
159
Bergemont Albert
Santa Clara, US
91
JOHNSON Peter
Sunnyvale, US
87
Bulucea Constantin
Milpitas, US
75
Wong Hee
San Jose, US
57
Mirgorodski Yuri
Sunnyvale, US
56
Smith Gregory J
Tucson, US
56
SMEYS Peter
Mountain View, US
54
Mostafazadeh Shahram
San Jose, US
52
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