PROMOS TECHNOLOGIES INC.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 365126
 
  
 
G11C STATIC STORES 8480
 
  
 
B24B MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING 2838
 
  
 
G06F ELECTRIC DIGITAL DATA PROCESSING 24423
 
  
 
H03K PULSE TECHNIQUE 21110
 
  
 
G03F PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR 1193
 
  
 
G11B INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER 9129
 
  
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 872
 
  
 
C23C COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL 695
 
  
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 694

Top Patents (by citation)

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Recent Publications

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8594114 Shielding of datalines with physical placement based on time staggered accessMay 29, 08Nov 26, 13[H04L, G06F, G11C]
8339882 Dual bit line precharge architecture and method for low power dynamic random access memory (DRAM) integrated circuit devices and devices incorporating embedded DRAMJul 12, 10Dec 25, 12[G11C]
8305425 Solid-state panoramic image capture apparatusAug 21, 09Nov 06, 12[H04N, G02B]
8283733 Semiconductor devices with gate electrodes and with monocrystalline silicon regions that contain atoms of nitrogen and one or more of chlorine, bromine, sulfur, fluorine, or phosphorusNov 05, 10Oct 09, 12[H01L]
8216877 Phase-change memory and fabrication method thereofApr 05, 11Jul 10, 12[H01L]
8125020 Non-volatile memory devices with charge storage regionsOct 15, 07Feb 28, 12[H01L]
8103978 Method for establishing scattering bar ruleAug 26, 08Jan 24, 12[G06F]
8071970 Phase change memory device and fabrication method thereofDec 04, 08Dec 06, 11[H01L]
7989795 Phase change memory device and method for fabricating the sameSep 18, 07Aug 02, 11[H01L]
7932565 Integrated circuit structure having bottle-shaped isolationAug 18, 08Apr 26, 11[H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2012/0008,445 DUAL BIT LINE PRECHARGE ARCHITECTURE AND METHOD FOR LOW POWER DYNAMIC RANDOM ACCESS MEMORY (DRAM) INTEGRATED CIRCUIT DEVICES AND DEVICES INCORPORATING EMBEDDED DRAMAbandonedJul 12, 10Jan 12, 12[G11C, H05K]
2010/0062,593 METHOD FOR PREPARING MULTI-LEVEL FLASH MEMORY DEVICESAbandonedSep 10, 08Mar 11, 10[H01L]
2010/0050,939 METHOD FOR DETERMINING THE PERFORMANCE OF IMPLANTING APPARATUSAbandonedAug 26, 08Mar 04, 10[B05C]
2010/0041,192 Method For Preparing Multi-Level Flash Memory StructureAbandonedAug 12, 08Feb 18, 10[H01L]
2010/0019,309 MULTI-LEVEL FLASH MEMORY STRUCTUREAbandonedJul 23, 08Jan 28, 10[H01L]
2010/0020,599 MULTI-LEVEL FLASH MEMORYAbandonedJul 23, 08Jan 28, 10[G11C]
2010/0022,058 METHOD FOR PREPARING MULTI-LEVEL FLASH MEMORYAbandonedJul 23, 08Jan 28, 10[H01L]
2010/0012,996 DYNAMIC RANDOM ACCESS MEMORY STRUCTUREAbandonedJul 16, 08Jan 21, 10[H01L]
2010/0001,394 CHIP PACKAGE WITH ESD PROTECTION STRUCTUREAbandonedJul 03, 08Jan 07, 10[H01L]
2009/0317,982 ATOMIC LAYER DEPOSITION APPARATUS AND METHOD FOR PREPARING METAL OXIDE LAYERAbandonedJun 19, 08Dec 24, 09[C23C, H01L]
2009/0298,284 METHOD FOR PREPARING INTEGRATED CIRCUIT STRUCTURE WITH POLYMORPHOUS MATERIALAbandonedMay 28, 08Dec 03, 09[H01L]
2009/0291,548 METHOD FOR PREPARING P-TYPE POLYSILICON GATE STRUCTUREAbandonedMay 20, 08Nov 26, 09[H01L]
2009/0283,822 NON-VOLATILE MEMORY STRUCTURE AND METHOD FOR PREPARING THE SAMEAbandonedMay 16, 08Nov 19, 09[H01L]
2009/0239,315 METHOD AND SYSTEM FOR PROCESSING TEST WAFER IN PHOTOLITHOGRAPHY PROCESSAbandonedApr 30, 08Sep 24, 09[H01L]
2009/0224,787 PROBING APPARATUS FOR MEASURING ELECTRICAL PROPERTIES OF INTEGRATED CIRCUIT DEVICES ON SEMICONDUCTOR WAFERAbandonedMar 05, 08Sep 10, 09[G01R]
2009/0212,794 TEST KEY FOR SEMICONDUCTOR STRUCTUREAbandonedAug 12, 08Aug 27, 09[G01R]
2009/0206,870 METHOD FOR ANALYZING IC DEVICES AND WAFERSAbandonedAug 08, 08Aug 20, 09[G01R]
2009/0189,246 METHOD OF FORMING TRENCH ISOLATION STRUCTURES AND SEMICONDUCTOR DEVICE PRODUCED THEREBYAbandonedJul 23, 08Jul 30, 09[H01L]
2009/0191,686 Method for Preparing Doped Polysilicon Conductor and Method for Preparing Trench Capacitor Structure Using the SameAbandonedApr 23, 08Jul 30, 09[H01L]
2009/0127,618 MULTI-FIN FIELD EFFECT TRANSISTORAbandonedJan 22, 09May 21, 09[H01L]

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