QUICKTURN DESIGN SYSTEMS, INC.
Patent Owner
Stats
- 15 total patents issued
- 3 Total Apps Published
- Sep 20, 2007 most recent publication
Details
- 15 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 1,203 Total Citation Count
- Mar 01, 1985 Earliest Filing
- 5 Expired/Abandoned/Withdrawn Patents
Technologies
Intl Class
Technology
# of Patents
Rank
Top Patents (by citation)
Patent #
Title
Filing Date
Issue Date
Intl Class
Cited #
6,184,707 Look-up table based logic element with complete permutability of the inputs to the secondary signalsOct 07, 98Feb 06, 01[G06F]144
5,812,414 Method for performing simulation using a hardware logic emulation systemDec 19, 96Sep 22, 98[G06F]42
5,796,623 Apparatus and method for performing computations with electrically reconfigurable logic devicesDec 19, 96Aug 18, 98[G06F]33
5,114,353 Multiple connector arrangement for printed circuit board interconnectionMar 01, 91May 19, 92[H05K]21
5,734,581 Method for implementing tri-state nets in a logic emulation systemDec 19, 96Mar 31, 98[H03K]19
Recent Publications
Publication #
Title
Filing Date
Pub Date
Intl Class
2003/0154,458 Emulation circuit with a hold time algorithm, logic analyzer and shadow memoryJan 30, 03Aug 14, 03[G06F]
2002/0178,427 Method for improving timing behavior in a hardware logic emulation systemMay 25, 01Nov 28, 02[G06F]
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
6,184,707 Look-up table based logic element with complete permutability of the inputs to the secondary signalsOct 07, 98Feb 06, 01[G06F]
5,812,414 Method for performing simulation using a hardware logic emulation systemDec 19, 96Sep 22, 98[G06F]
5,796,623 Apparatus and method for performing computations with electrically reconfigurable logic devicesDec 19, 96Aug 18, 98[G06F]
5,734,581 Method for implementing tri-state nets in a logic emulation systemDec 19, 96Mar 31, 98[H03K]
5,114,353 Multiple connector arrangement for printed circuit board interconnectionMar 01, 91May 19, 92[H05K]
Top Inventors for This Owner
Inventor Name
Address
# of Patent/Pub