RAMBUS INC.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
G06F ELECTRIC DIGITAL DATA PROCESSING 629115
 
  
 
G11C STATIC STORES 51523
 
  
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 260101
 
  
 
H03K PULSE TECHNIQUE 18430
 
  
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 114250
 
  
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 9321
 
  
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 8782
 
  
 
H04B TRANSMISSION 79133
 
  
 
H03H IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS 5424
 
  
 
H04N PICTORIAL COMMUNICATION, e.g. TELEVISION 51191

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0011,805 Memory controller that uses a specific timing reference signal in connection with a data brust following a specified idle periodApr 26, 17Jan 11, 18[G06F, G11C]
2018/0013,438 INTEGRATED CIRCUIT COMPRISING CIRCUITRY TO DETERMINE SETTINGS FOR AN INJECTION-LOCKED OSCILLATORJun 23, 17Jan 11, 18[H03L, H03K]
2017/0315,953 MEMORY SYSTEM WITH INDEPENDENTLY ADJUSTABLE CORE AND INTERFACE DATA RATESJun 16, 17Nov 02, 17[G06F]
2017/0285,957 MULTIPLE MEMORY RANK SYSTEM AND SELECTION METHOD THEREOFJun 21, 17Oct 05, 17[G06F, G11C]
2017/0214,515 Phase Control Block for Managing Multiple Clock Domains in Systems with Frequency OffsetsDec 05, 16Jul 27, 17[H03L, H04L]
2017/0186,478 Memory System Topologies Including A Buffer Device And An Integrated Circuit Memory DeviceDec 22, 16Jun 29, 17[G06F, G11C]
2017/0178,702 MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATIONDec 26, 16Jun 22, 17[G11C]
2017/0168,950 TECHNIQUES FOR STORING DATA AND TAGS IN DIFFERENT MEMORY ARRAYSDec 22, 16Jun 15, 17[G06F, G11C]
2017/0147,263 MEMORY BUFFERS AND MODULES SUPPORTING DYNAMIC POINT-TO-POINT CONNECTIONSOct 27, 16May 25, 17[G06F, G11C]
2017/0098,595 DISTRIBUTED ON-CHIP DECOUPLING APPARATUS AND METHOD USING PACKAGE INTERCONNECTOct 03, 16Apr 06, 17[H01L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9921751 Methods and systems for mapping a peripheral function onto a legacy memory interfaceJan 19, 16Mar 20, 18[G06F, G11C]
9923602 Configurable, power supply voltage referenced single-ended signaling with ESD protectionApr 25, 16Mar 20, 18[H04L, H04B, G06F, H02H]
9923711 Low power edge and data samplingApr 13, 11Mar 20, 18[H04L]
9916196 Memory module with dedicated repair devicesFeb 25, 15Mar 13, 18[G06F, G11C]
9916873 Extended capacity memory module with dynamic data buffersFeb 02, 16Mar 13, 18[G11C]
9916877 Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory dieNov 30, 15Mar 13, 18[H01L, G11C]
9917708 Partial response receiverApr 06, 16Mar 13, 18[H04L, H01L]
9910612 Memory buffer with one or more auxiliary interfacesApr 25, 16Mar 06, 18[G06F, G11C]
9911468 Memory with deferred fractional row activationDec 26, 16Mar 06, 18[G11C]
9912469 Phase control block for managing multiple clock domains in systems with frequency offsetsDec 05, 16Mar 06, 18[H03L, H04L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2017/0178,713 MEMORY REFRESH METHOD AND DEVICESAbandonedDec 27, 16Jun 22, 17[G11C]
2017/0132,150 Memory Controller For Selective Rank Or Subrank AccessAbandonedOct 17, 16May 11, 17[G06F]
2017/0054,576 Receiver with Clock Recovery Circuit and Adaptive Sample and Equalizer TimingAbandonedSep 08, 16Feb 23, 17[H04L]
2016/0198,104 IMAGE SENSOR WITH A SPLIT-COUNTER ARCHITECTUREAbandonedOct 07, 15Jul 07, 16[H01L, H04N]
2016/0110,136 ISOLATED SHARED MEMORY ARCHITECTURE (iSMA)AbandonedDec 18, 15Apr 21, 16[G06F]
2015/0349,798 CONTROLLER THAT RECEIVES A CYCLIC REDUNDANCY CHECK (CRC) CODE FROM AN ELECTRICALLY ERASABLE PROGRAMMABLE MEMORY DEVICEAbandonedAug 11, 15Dec 03, 15[H03M, G06F]
2015/0331,732 MEMORY DEVICE HAVING STORAGE FOR AN ERROR CODE CORRECTION EVENT COUNTAbandonedMay 08, 15Nov 19, 15[G06F, G11C]
2014/0314,406 Systems and Methods for Temperature Insensitive Photonic TransmissionAbandonedNov 30, 12Oct 23, 14[H04B, H04J]
2014/0286,383 Selectable-tap EqualizerAbandonedJan 01, 14Sep 25, 14[H04L, H04B]
2014/0219,008 Semiconductor Memory Device with Hierarchical BitlinesAbandonedApr 04, 14Aug 07, 14[G11C]
2014/0098,589 REPLACEMENT OF A FAULTY MEMORY CELL WITH A SPARE CELL FOR A MEMORY CIRCUITAbandonedSep 14, 12Apr 10, 14[G11C]
2014/0071,329 RECONFIGURABLE OPTICAL DEVICE USING A TOTAL INTERNAL REFLECTION (TIR) OPTICAL SWITCHAbandonedSep 06, 13Mar 13, 14[H04N, G02B]
2014/0052,906 MEMORY CONTROLLER RESPONSIVE TO LATENCY-SENSITIVE APPLICATIONS AND MIXED-GRANULARITY ACCESS REQUESTSAbandonedAug 05, 13Feb 20, 14[G06F, G11C]
2013/0346,822 ERROR DETECTION AND OFFSET CANCELLATION DURING MULTI-WIRE COMMUNICATIONAbandonedJun 10, 13Dec 26, 13[H03M]
2013/0339,464 CONTACT AND IDENTITY MANAGEMENT IN A HETEROGENEOUS NETWORK WITH DISPARATE CLIENTSAbandonedDec 13, 11Dec 19, 13[H04L]
2013/0322,510 SIGNAL LINE ROUTING TO REDUCE CROSSTALK EFFECTSAbandonedMay 13, 13Dec 05, 13[H04B]
2013/0290,494 SESSION MANAGEMENT FOR COMMUNICATION IN A HETEROGENEOUS NETWORKAbandonedOct 20, 11Oct 31, 13[H04L]
2013/0250,657 System and Method for Writing Data to an RRAM CellAbandonedMar 07, 13Sep 26, 13[G11C]
8509321 Simultaneous bi-directional linkExpiredDec 23, 04Aug 13, 13[H04K]
8497544 Repairing defects in a nonvolatile semiconductor memory module utilizing a heating elementExpiredJun 01, 12Jul 30, 13[H01L]

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