RAMBUS INC.

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Technologies

Intl Class Technology # of Patents/ App Rank in Class
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 408127
 
 
 
G11C STATIC STORES 24534
 
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 13592
 
 
 
H03K PULSE TECHNIQUE 12437
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 75233
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 7074
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 5428
 
 
 
H04B TRANSMISSION 54131
 
 
 
H03H IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS 4126
 
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 2778

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2014/0253,195 OPEN-LOOP CORRECTION OF DUTY-CYCLE ERROR AND QUADRATURE PHASE ERRORJan 27, 14Sep 11, 14[H03K]
2014/0253,781 Phase Gratings with Odd Symmetry for High-Resolution Lensed and Lensless Optical SensingFeb 20, 14Sep 11, 14[H04N, G02B]
2014/0254,286 THERMAL ANNEAL USING WORD-LINE HEATING ELEMENTDec 05, 13Sep 11, 14[G11C]
2014/0254,294 MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMSMay 21, 14Sep 11, 14[G11C]
2014/0258,601 Memory Controller Supporting Nonvolatile Physical MemoryMay 16, 14Sep 11, 14[G06F]
2014/0258,768 CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMINISTIC EVENTOct 11, 12Sep 11, 14[G06F]
2014/0247,637 MULTI-DIE MEMORY DEVICEMay 15, 14Sep 04, 14[G11C]
2014/0247,656 Pulse Control For NonVolatile MemoryJan 01, 14Sep 04, 14[G11C]
2014/0247,678 PROGRAMMABLE MEMORY REPAIR SCHEMEJan 08, 14Sep 04, 14[G11C]
2014/0247,911 Partial Response Receiver And Related MethodJan 06, 14Sep 04, 14[H04L]
2014/0244,923 MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATIONMay 01, 14Aug 28, 14[G11C, G06F]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8,836,394 Method and apparatus for source-synchronous signalingJun 14, 12Sep 16, 14[H04L, G11C, H03L]
8,837,236 Hybrid nonvolatile shadowed DRAM with an overlapping region between a volatile storage die and a nonvolatile storage dieApr 22, 13Sep 16, 14[G11C, G06F]
8,838,900 Atomic-operation coalescing technique in multi-chip systemsJun 10, 13Sep 16, 14[G06F]
8,824,222 Fast-wake memoryAug 04, 11Sep 02, 14[G11C]
8,824,224 Frequency-agile strobe window generationJul 10, 12Sep 02, 14[G11C]
8,817,849 Methods and systems for transmitting data by modulating transmitter filter coefficientsMar 25, 08Aug 26, 14[H04B]
8,817,863 Linear equalizer with passive network and embedded level shifterJan 25, 12Aug 26, 14[H03H]
8,817,932 Margin test methods and circuitsAug 15, 13Aug 26, 14[H04L]
8,811,095 Methods and circuits for dynamically scaling DRAM power and performanceDec 01, 10Aug 19, 14[G11C]
8,811,553 Edge based partial response equalizationJul 01, 13Aug 19, 14[H03H, H04L, H04B]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Filing Date Issue/Pub Date Intl Class
2013/0148,437 THERMAL ANNEAL USING WORD-LINE HEATING ELEMENTDec 22, 12Jun 13, 13[G11C]
2013/0072,171 ENHANCING MOBILE DEVICE COVERAGESep 13, 12Mar 21, 13[H04W]
2013/0063,191 Methods and Circuits for Duty-Cycle CorrectionSep 12, 12Mar 14, 13[H03K, H03L]
2012/0306,568 REDUCING CROSSTALK BETWEEN MULTIPLE INTERCONNECTSJun 05, 12Dec 06, 12[H03K]
2012/0281,126 DIGITAL INTEGRATION SENSORApr 08, 12Nov 08, 12[H04N]
2012/0281,489 Low Power Memory DeviceMay 07, 12Nov 08, 12[G11C]
2012/0215,952 Protocol for Transmission of Data Over a Communication LinkOct 11, 10Aug 23, 12[G06F]
2012/0182,304 Scalable Unified Memory ArchitectureMar 26, 12Jul 19, 12[G06F]
2012/0139,638 Methods and Circuits for Controlling Amplifier Gain Over Process, Voltage, and TemperatureDec 02, 11Jun 07, 12[H03F]
2012/0013,361 Synthetic Pulse Generator for Reducing Supply NoiseJan 14, 10Jan 19, 12[H03K]
2012/0011,331 MEMORY SYSTEM, CONTROLLER AND DEVICE THAT SUPPORTS A MERGED MEMORY COMMAND PROTOCOLMar 10, 10Jan 12, 12[G06F]
2011/0307,672 MEMORY INTERFACE WITH INTERLEAVED CONTROL INFORMATIONFeb 25, 10Dec 15, 11[G06F]
2011/0249,718 METHOD AND APPARATUS FOR CORRECTING PHASE ERRORS DURING TRANSIENT EVENTS IN HIGH-SPEED SIGNALING SYSTEMSDec 29, 09Oct 13, 11[H04L, H04B]
2011/0235,763 SIGNALING SYSTEM WITH ASYMMETRICALLY-MANAGED TIMING CALIBRATIONJul 09, 09Sep 29, 11[H04L]
2011/0238,870 Memory System With Command FilteringNov 17, 09Sep 29, 11[G06F]
2011/0202,709 OPTIMIZING STORAGE OF COMMON PATTERNS IN FLASH MEMORYMar 04, 09Aug 18, 11[G06F]
2011/0141,829 Circuits for Reducing Power Consumption of Memory ComponentsDec 14, 10Jun 16, 11[G11C, H03K]
2011/0119,425 DETACHABLE INTERCONNECT FOR CONFIGURABLE WIDTH MEMORY SYSTEMJun 30, 08May 19, 11[G06F]
2011/0066,792 Segmentation Of Flash Memory For Partial Volatile StorageFeb 04, 09Mar 17, 11[G06F]
2011/0060,868 MULTI-BANK FLASH MEMORY ARCHITECTURE WITH ASSIGNABLE RESOURCESFeb 10, 09Mar 10, 11[G06F]

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