RAMBUS INC.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 455125
 
 
 
G11C STATIC STORES 31929
 
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 17491
 
 
 
H03K PULSE TECHNIQUE 14234
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 80244
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 7284
 
 
 
H04B TRANSMISSION 62128
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 6031
 
 
 
H03H IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS 4427
 
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 2978

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2015/0234,707 Error Correction In A Memory DeviceApr 21, 15Aug 20, 15[G11C, G06F]
2015/0234,738 Memory System With Activate-Leveling MethodDec 10, 14Aug 20, 15[G06F]
2015/0234,754 Memory Systems with Multiple Modules Supporting Simultaneous Access Responsive to Common Memory CommandsMay 04, 15Aug 20, 15[G11C, G06F]
2015/0236,694 NONVOLATILE MEMORY DEVICE WITH TIME-MULTIPLEXED, ON-DIE-TERMINATED SIGNALING INTERFACEApr 24, 15Aug 20, 15[G11C, H03K]
2015/0227,188 MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODESApr 23, 15Aug 13, 15[G06F]
2015/0228,340 HYBRID VOLATILE AND NON-VOLATILE MEMORY DEVICEApr 27, 15Aug 13, 15[G11C]
2015/0229,306 NONVOLATILE MEMORY DEVICE WITH ON-DIE CONTROL AND DATA SIGNAL TERMINATIONApr 24, 15Aug 13, 15[G11C, H03K]
2015/0229,468 COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONSApr 24, 15Aug 13, 15[H04L]
2015/0229,859 FEEDTHROUGH-COMPENSATED IMAGE SENSORFeb 06, 15Aug 13, 15[H04N]
2015/0219,808 PATCHWORK FRESNEL ZONE PLATES FOR LENSLESS IMAGINGAug 12, 14Aug 06, 15[H04N, G02B]
2015/0220,270 CHIP STORING A VALUE THAT REPRESENTS ADJUSTMENT TO OUTPUT DRIVE STRENGTHApr 14, 15Aug 06, 15[G06F]
2015/0221,354 Read Strobe Gating MechanismDec 16, 14Aug 06, 15[G11C]
2015/0221,589 DISTRIBUTED ON-CHIP DECOUPLING APPARATUS AND METHOD USING PACKAGE INTERCONNECTApr 09, 15Aug 06, 15[H01L, H03K]
2015/0222,303 HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASISFeb 11, 15Aug 06, 15[H04B]
2015/0223,333 LOAD REDUCED MEMORY MODULEApr 15, 15Aug 06, 15[H05K]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9,110,240 Phase gratings with odd symmetry for high-resolution lensed and lensless optical sensingFeb 20, 14Aug 18, 15[H04N, G02B]
9,110,596 Fast-wake memoryJul 29, 14Aug 18, 15[G11C, G06F]
9,110,828 Chip having register to store value that represents adjustment to reference voltageJul 01, 14Aug 18, 15[G11C, G06F, H03K]
9,111,587 Stacked memory with redundancyJun 30, 14Aug 18, 15[G11C, H01L]
9,111,588 Multi-die DRAM banks arrangement and wiringDec 07, 11Aug 18, 15[G11C]
9,111,608 Strobe-offset control circuitMar 31, 14Aug 18, 15[G11C, G06F]
9,111,612 Direct relative measurement of memory durabilityMar 07, 13Aug 18, 15[G01R, G11C, G06F]
9,111,645 Request-command encoding for reduced-data-rate testingJul 17, 09Aug 18, 15[G11C]
9,112,739 Methods and circuits for adaptive equalizationMar 26, 14Aug 18, 15[H04L]
9,104,646 Memory disturbance recovery mechanismDec 05, 13Aug 11, 15[G11C, G06F]
9,105,325 Memory controller for strobe-based memory systemsMay 21, 14Aug 11, 15[G11C, G06F]
9,106,397 Selectable-tap equalizerFeb 06, 15Aug 11, 15[H04L]
9,106,399 Phase control block for managing multiple clock domains in systems with frequency offsetsJul 01, 14Aug 11, 15[H04L, H03L]
9,098,209 Communication via a memory interfaceOct 27, 13Aug 04, 15[G11C, G06F]
9,098,281 Power-management for integrated circuitsMar 08, 12Aug 04, 15[G11C, G06F]
9,099,194 Memory component with pattern register circuitry to provide data patterns for calibrationAug 14, 13Aug 04, 15[H04L, G11C, G06F]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2014/0219,008 Semiconductor Memory Device with Hierarchical BitlinesABANApr 04, 14Aug 07, 14[G11C]
2013/0346,822 ERROR DETECTION AND OFFSET CANCELLATION DURING MULTI-WIRE COMMUNICATIONABANJun 10, 13Dec 26, 13[H03M]
2013/0322,510 SIGNAL LINE ROUTING TO REDUCE CROSSTALK EFFECTSABANMay 13, 13Dec 05, 13[H04B]
2013/0250,657 System and Method for Writing Data to an RRAM CellABANMar 07, 13Sep 26, 13[G11C]
2013/0168,674 Methods and Systems for Repairing Interior Device Layers in Three-Dimensional Integrated CircuitsABANDec 19, 12Jul 04, 13[H01L]
2013/0148,437 THERMAL ANNEAL USING WORD-LINE HEATING ELEMENTABANDec 22, 12Jun 13, 13[G11C]
2013/0072,171 ENHANCING MOBILE DEVICE COVERAGEABANSep 13, 12Mar 21, 13[H04W]
2013/0063,191 Methods and Circuits for Duty-Cycle CorrectionABANSep 12, 12Mar 14, 13[H03K, H03L]
2013/0051,162 CODED DIFFERENTIAL INTERSYMBOL INTERFERENCE REDUCTIONABANMar 14, 11Feb 28, 13[G11C]
2012/0306,568 REDUCING CROSSTALK BETWEEN MULTIPLE INTERCONNECTSABANJun 05, 12Dec 06, 12[H03K]
2012/0281,126 DIGITAL INTEGRATION SENSORABANApr 08, 12Nov 08, 12[H04N]
2012/0281,489 Low Power Memory DeviceABANMay 07, 12Nov 08, 12[G11C]
2012/0218,001 Techniques for Phase DetectionABANOct 31, 10Aug 30, 12[H03D]
2012/0215,952 Protocol for Transmission of Data Over a Communication LinkABANOct 11, 10Aug 23, 12[G06F]
2012/0191,943 DYNAMIC PROTOCOL FOR COMMUNICATING COMMAND AND ADDRESS INFORMATIONABANAug 29, 10Jul 26, 12[G06F]
2012/0182,304 Scalable Unified Memory ArchitectureABANMar 26, 12Jul 19, 12[G06F]
2012/0184,242 Methods and Systems for Enhancing Wireless CoverageABANAug 31, 10Jul 19, 12[H04W]
2012/0139,638 Methods and Circuits for Controlling Amplifier Gain Over Process, Voltage, and TemperatureABANDec 02, 11Jun 07, 12[H03F]
2012/0013,361 Synthetic Pulse Generator for Reducing Supply NoiseABANJan 14, 10Jan 19, 12[H03K]
2012/0011,331 MEMORY SYSTEM, CONTROLLER AND DEVICE THAT SUPPORTS A MERGED MEMORY COMMAND PROTOCOLABANMar 10, 10Jan 12, 12[G06F]

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