RAMBUS INC.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 435129
 
 
 
G11C STATIC STORES 28831
 
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 16187
 
 
 
H03K PULSE TECHNIQUE 13537
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 75242
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 7077
 
 
 
H04B TRANSMISSION 59133
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 5829
 
 
 
H03H IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS 4325
 
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 2976

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2015/0103,479 LOAD REDUCED MEMORY MODULEOct 15, 14Apr 16, 15[G11C, G06F, H05K]
2015/0103,605 DRAM SENSE AMPLIFIER THAT SUPPORTS LOW MEMORY-CELL CAPACITANCEOct 03, 14Apr 16, 15[G11C]
2015/0103,607 DRIVER CIRCUITDec 17, 14Apr 16, 15[G11C]
2015/0103,610 PROTOCOL FOR MEMORY POWER-MODE CONTROLDec 17, 14Apr 16, 15[G11C]
2015/0103,875 Partial Response Equalizer and Related MethodDec 16, 14Apr 16, 15[H04L]
2015/0103,876 PARTIAL RESPONSE DECISION FEEDBACK EQUALIZER WITH SELECTION CIRCUITRY HAVING HOLD STATEDec 18, 14Apr 16, 15[H04L]
2015/0103,943 Forwarding Signal Supply Voltage in Data Transmission SystemDec 17, 14Apr 16, 15[H04L, G11C]
2015/0106,560 METHODS AND SYSTEMS FOR MAPPING A PERIPHERAL FUNCTION ONTO A LEGACY MEMORY INTERFACEDec 17, 14Apr 16, 15[G06F]
2015/0106,561 MEMORY COMPONENT WITH ADJUSTABLE CORE-TO-INTERFACE DATA RATE RATIOOct 02, 14Apr 16, 15[G11C, G06F]
2015/0098,297 TIMING-DRIFT CALIBRATIONDec 15, 14Apr 09, 15[G11C]
2015/0091,617 LOW-LATENCY, FREQUENCY-AGILE CLOCK MULTIPLIERDec 10, 14Apr 02, 15[H03K, H03L]
2015/0092,869 Interface with Variable Data RateOct 06, 14Apr 02, 15[H04L]
2015/0092,898 Receiver with enhanced clock and data recoveryDec 08, 14Apr 02, 15[H04L]
2015/0095,748 CODE-ASSISTED ERROR-DETECTION TECHNIQUEDec 11, 14Apr 02, 15[G06F]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9,006,907 Distributed on-chip decoupling apparatus and method using package interconnectMay 28, 13Apr 14, 15[H01L]
9,007,853 Memory systems and methods for dynamically phase adjusting a write strobe and data to account for receive-clock driftOct 07, 13Apr 14, 15[G11C, G06F]
9,007,862 Reducing memory refresh exit timeJul 09, 13Apr 14, 15[G11C]
9,009,400 Semiconductor memory systems with on-die data bufferingSep 11, 13Apr 14, 15[G11C, G06F]
9,000,803 High speed signaling system with adaptive transmit pre-emphasisJun 07, 13Apr 07, 15[H04L, H04B, H03K]
9,001,231 Image acquisition using oversampled one-bit poisson statisticsJun 04, 12Apr 07, 15[H04N, G06T]
9,001,251 Oversampled image sensor with conditional pixel readoutSep 10, 14Apr 07, 15[H04N, H01L]
9,001,606 Memory methods and systems with adiabatic switchingAug 22, 11Apr 07, 15[G11C]
8,994,398 High speed signaling system with adaptive transmit pre-emphasisJun 07, 13Mar 31, 15[H04L, H04B, H03K]
8,995,598 Low jitter clock recovery circuitDec 06, 11Mar 31, 15[H04L, H03D, H03L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2013/0346,822 ERROR DETECTION AND OFFSET CANCELLATION DURING MULTI-WIRE COMMUNICATIONABANJun 10, 13Dec 26, 13[H03M]
2013/0322,510 SIGNAL LINE ROUTING TO REDUCE CROSSTALK EFFECTSABANMay 13, 13Dec 05, 13[H04B]
2013/0250,657 System and Method for Writing Data to an RRAM CellABANMar 07, 13Sep 26, 13[G11C]
2013/0168,674 Methods and Systems for Repairing Interior Device Layers in Three-Dimensional Integrated CircuitsABANDec 19, 12Jul 04, 13[H01L]
2013/0148,437 THERMAL ANNEAL USING WORD-LINE HEATING ELEMENTABANDec 22, 12Jun 13, 13[G11C]
2013/0072,171 ENHANCING MOBILE DEVICE COVERAGEABANSep 13, 12Mar 21, 13[H04W]
2013/0063,191 Methods and Circuits for Duty-Cycle CorrectionABANSep 12, 12Mar 14, 13[H03K, H03L]
2013/0051,162 CODED DIFFERENTIAL INTERSYMBOL INTERFERENCE REDUCTIONABANMar 14, 11Feb 28, 13[G11C]
2012/0306,568 REDUCING CROSSTALK BETWEEN MULTIPLE INTERCONNECTSABANJun 05, 12Dec 06, 12[H03K]
2012/0281,126 DIGITAL INTEGRATION SENSORABANApr 08, 12Nov 08, 12[H04N]
2012/0281,489 Low Power Memory DeviceABANMay 07, 12Nov 08, 12[G11C]
2012/0218,001 Techniques for Phase DetectionABANOct 31, 10Aug 30, 12[H03D]
2012/0215,952 Protocol for Transmission of Data Over a Communication LinkABANOct 11, 10Aug 23, 12[G06F]
2012/0191,943 DYNAMIC PROTOCOL FOR COMMUNICATING COMMAND AND ADDRESS INFORMATIONABANAug 29, 10Jul 26, 12[G06F]
2012/0182,304 Scalable Unified Memory ArchitectureABANMar 26, 12Jul 19, 12[G06F]
2012/0184,242 Methods and Systems for Enhancing Wireless CoverageABANAug 31, 10Jul 19, 12[H04W]
2012/0139,638 Methods and Circuits for Controlling Amplifier Gain Over Process, Voltage, and TemperatureABANDec 02, 11Jun 07, 12[H03F]
2012/0013,361 Synthetic Pulse Generator for Reducing Supply NoiseABANJan 14, 10Jan 19, 12[H03K]
2012/0011,331 MEMORY SYSTEM, CONTROLLER AND DEVICE THAT SUPPORTS A MERGED MEMORY COMMAND PROTOCOLABANMar 10, 10Jan 12, 12[G06F]
2011/0307,672 MEMORY INTERFACE WITH INTERLEAVED CONTROL INFORMATIONABANFeb 25, 10Dec 15, 11[G06F]

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