RAMBUS INC.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 583120
 
 
 
G11C STATIC STORES 43922
 
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 23097
 
 
 
H03K PULSE TECHNIQUE 18031
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 104239
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 8482
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 8221
 
 
 
H04B TRANSMISSION 77126
 
 
 
H03H IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS 5127
 
 
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 4169

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2017/0040,047 MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATIONAug 19, 16Feb 09, 17[G11C, G06F]
2017/0031,854 FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATIONJul 29, 16Feb 02, 17[G06F]
2017/0031,864 FLASH CONTROLLER TO PROVIDE A VALUE THAT REPRESENTS A PARAMETER TO A FLASH MEMORYAug 04, 16Feb 02, 17[G06F]
2017/0033,918 COLLABORATIVE CLOCK AND DATA RECOVERYJul 18, 16Feb 02, 17[H04L, H03K, H03L]
2017/0024,348 Folded Memory ModulesOct 10, 16Jan 26, 17[G06F]
2017/0025,187 SYSTEM INCLUDING HIERARCHICAL MEMORY MODULES HAVING DIFFERENT TYPES OF INTEGRATED CIRCUIT MEMORY DEVICESSep 30, 16Jan 26, 17[G11C]
2017/0017,594 Stacked Semiconductor Device Assembly in Computer SystemSep 27, 16Jan 19, 17[G11C, G06F, H01L]
2017/0010,964 WEAR LEVELING IN A MEMORY SYSTEMJul 11, 16Jan 12, 17[G06F]
2017/0012,623 Calibration Methods and Circuits to Calibrate Drive Current and Termination ImpedanceJun 24, 16Jan 12, 17[H03K]
2017/0004,099 COORDINATING MEMORY OPERATIONS USING MEMORY-DEVICE GENERATED REFERENCE SIGNALSJun 06, 16Jan 05, 17[G11C, G06F]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9568544 Testing fuse configurations in semiconductor devicesApr 10, 14Feb 14, 17[G01R]
9568546 Delay fault testing for chip I/OFeb 15, 12Feb 14, 17[G01R]
9568942 Drift adjustment in timing signal forwarded from memory controller to memory device based on a detected phase delay occurring on a second timing signal with a different frequencyDec 07, 15Feb 14, 17[H04L, G06F, H03L]
9568980 Using dynamic bursts to support frequency-agile memory interfacesSep 06, 13Feb 14, 17[G06F]
9569308 Reduced-overhead error detection and correctionJul 11, 14Feb 14, 17[G06F]
9569359 Methods and apparatuses for addressing memory cachesFeb 22, 12Feb 14, 17[G11C, G06F]
9569393 Memory module threading with staggered data transfersAug 09, 13Feb 14, 17[G06F]
9569396 Interface with variable data rateNov 03, 15Feb 14, 17[H04L, G06F]
9570126 Memory with deferred fractional row activationApr 26, 16Feb 14, 17[G11C]
9570129 On-die termination of address and command signalsMar 25, 16Feb 14, 17[G11C]
9570144 Memory refresh method and devicesFeb 18, 16Feb 14, 17[G11C]
9570145 Protocol for refresh between a memory controller and a memory deviceNov 26, 14Feb 14, 17[G11C, G06F]
9570146 Alternate access to DRAM data using cycle stealingFeb 14, 14Feb 14, 17[G11C, G06F]
9570164 System and method for performing memory operations on RRAM cellsAug 10, 12Feb 14, 17[G11C]
9570165 1D-2R memory architectureDec 11, 14Feb 14, 17[G11C, H01L]
9570171 Resistance change memory cell circuits and methodsSep 26, 15Feb 14, 17[G11C]
9570196 Testing through-silicon-viasAug 31, 12Feb 14, 17[G01R, G11C, H01L]
9571034 Electronic circuits using coupled multi-inductorsFeb 22, 16Feb 14, 17[H01F, H03B, H03K]
9571077 Dynamic update technique for phase interpolator device and method thereforJul 13, 15Feb 14, 17[H03H, H03K, H03L]
9571231 In-band status encoding and decoding using error correction symbolsJul 30, 15Feb 14, 17[H04L, G06F, H03M]
9562934 Technique for determining performance characteristics of electronic devices and systemsJun 18, 13Feb 07, 17[G01R, G11C, H04B]
9563007 Modular light-emitting panel assemblySep 28, 12Feb 07, 17[F21V]
9563228 Clock generation for timing communications with ranks of memory devicesNov 30, 15Feb 07, 17[H04L, G11C, G06F]
9563556 Techniques for storing data and tags in different memory arraysOct 21, 11Feb 07, 17[G11C, G06F]
9563583 Memory system topologies including a buffer device and an integrated circuit memory deviceJul 16, 15Feb 07, 17[G11C, G06F, H01L]
9563597 High capacity memory systems with inter-rank skew toleranceDec 20, 12Feb 07, 17[G11C, G06F]
9564192 Memory controller for strobe-based memory systemsJul 06, 16Feb 07, 17[G11C]
9564225 Pulse control for non-volatile memoryOct 08, 15Feb 07, 17[G11C]
9564879 Reference voltage generation and calibration for single-ended signalingSep 15, 15Feb 07, 17[H04L, H04B, H03K]
9564885 Event-driven clock duty cycle controlNov 16, 12Feb 07, 17[H03K]
9564909 Method and circuit for delay adjustment monotonicity in a delay lineSep 22, 15Feb 07, 17[H03H, H03L]
9564911 Integrated circuit having a multiplying injection-locked oscillatorSep 18, 15Feb 07, 17[H03B, H03K, H03L]
9564912 Integrated circuit having a clock deskew circuit that includes an injection-locked oscillatorJan 07, 16Feb 07, 17[G11C, H03L]
9565036 Techniques for adjusting clock signals to compensate for noiseMay 31, 10Feb 07, 17[H04L, G06F, H03K]
9565039 Forwarding signal supply voltage in data transmission systemDec 17, 14Feb 07, 17[H04L, G11C, G06F, H04B]
9565041 Adaptive equalization using correlation of edge samples with data patternsMay 04, 15Feb 07, 17[H04L, G01N]
9565385 Image sensor having sub-diffraction-limit pixelsNov 20, 15Feb 07, 17[H04N, H01L]
9552865 Method and apparatus for calibrating write timing in a memory systemNov 03, 15Jan 24, 17[G11C, G06F]
9553745 High-speed signaling systems with adaptable pre-emphasis and equalizationApr 20, 12Jan 24, 17[H04L, H04W]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2016/0198,104 IMAGE SENSOR WITH A SPLIT-COUNTER ARCHITECTUREABANOct 07, 15Jul 07, 16[H04N, H01L]
2014/0314,406 Systems and Methods for Temperature Insensitive Photonic TransmissionABANNov 30, 12Oct 23, 14[H04J, H04B]
2014/0286,383 Selectable-tap EqualizerABANJan 01, 14Sep 25, 14[H04L, H04B]
2014/0219,008 Semiconductor Memory Device with Hierarchical BitlinesABANApr 04, 14Aug 07, 14[G11C]
2014/0071,329 RECONFIGURABLE OPTICAL DEVICE USING A TOTAL INTERNAL REFLECTION (TIR) OPTICAL SWITCHABANSep 06, 13Mar 13, 14[H04N, G02B]
2014/0052,906 MEMORY CONTROLLER RESPONSIVE TO LATENCY-SENSITIVE APPLICATIONS AND MIXED-GRANULARITY ACCESS REQUESTSABANAug 05, 13Feb 20, 14[G11C, G06F]
2013/0346,822 ERROR DETECTION AND OFFSET CANCELLATION DURING MULTI-WIRE COMMUNICATIONABANJun 10, 13Dec 26, 13[H03M]
2013/0339,464 CONTACT AND IDENTITY MANAGEMENT IN A HETEROGENEOUS NETWORK WITH DISPARATE CLIENTSABANDec 13, 11Dec 19, 13[H04L]
2013/0322,510 SIGNAL LINE ROUTING TO REDUCE CROSSTALK EFFECTSABANMay 13, 13Dec 05, 13[H04B]
2013/0290,494 SESSION MANAGEMENT FOR COMMUNICATION IN A HETEROGENEOUS NETWORKABANOct 20, 11Oct 31, 13[H04L]
2013/0250,657 System and Method for Writing Data to an RRAM CellABANMar 07, 13Sep 26, 13[G11C]
2013/0168,674 Methods and Systems for Repairing Interior Device Layers in Three-Dimensional Integrated CircuitsABANDec 19, 12Jul 04, 13[H01L]
2013/0148,437 THERMAL ANNEAL USING WORD-LINE HEATING ELEMENTABANDec 22, 12Jun 13, 13[G11C]
2013/0148,447 Reducing Power Consumption in a Memory SystemABANDec 06, 12Jun 13, 13[G11C]
2013/0132,704 MEMORY CONTROLLER AND METHOD FOR TUNED ADDRESS MAPPINGABANAug 29, 11May 23, 13[G06F]
2013/0072,171 ENHANCING MOBILE DEVICE COVERAGEABANSep 13, 12Mar 21, 13[H04W]
2013/0063,191 Methods and Circuits for Duty-Cycle CorrectionABANSep 12, 12Mar 14, 13[H03K, H03L]
2012/0306,568 REDUCING CROSSTALK BETWEEN MULTIPLE INTERCONNECTSABANJun 05, 12Dec 06, 12[H03K]
8311145 Bit-error rate in fixed line-rate systemsExpiredMay 07, 09Nov 13, 12[H04L]
2012/0281,126 DIGITAL INTEGRATION SENSORABANApr 08, 12Nov 08, 12[H04N]

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