RAMBUS INC.
Patent Owner
Stats
- 1,578 US PATENTS IN FORCE
- 134 US APPLICATIONS PENDING
- Mar 20, 2018 most recent publication
Details
- 1,578 Issued Patents
- 524 Issued in last 3 years
- 123 Published in last 3 years
- 40,435 Total Citation Count
- Aug 10, 1990 Earliest Filing
- 490 Expired/Abandoned/Withdrawn Patents
Patent Activity in the Last 10 Years
Technologies
Intl Class
Technology
Matters
Rank in Class
Top Patents (by citation)
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Recent Publications
Publication #
Title
Filing Date
Pub Date
Intl Class
2018/0047,436 MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DATA INTERFACESJun 14, 17Feb 15, 18[G11C, H01L]
2018/0011,805 Memory controller that uses a specific timing reference signal in connection with a data brust following a specified idle periodApr 26, 17Jan 11, 18[G11C, G06F]
2018/0013,438 INTEGRATED CIRCUIT COMPRISING CIRCUITRY TO DETERMINE SETTINGS FOR AN INJECTION-LOCKED OSCILLATORJun 23, 17Jan 11, 18[H03K, H03L]
2017/0351,627 DYNAMIC RANDOM ACCESS MEMORY (DRAM) COMPONENT FOR HIGH-PERFORMANCE, HIGH-CAPACITY REGISTERED MEMORY MODULESOct 28, 15Dec 07, 17[G06F]
2017/0330,611 VARIABLE WIDTH MEMORY MODULE SUPPORTING ENHANCED ERROR DETECTION AND CORRECTIONMay 31, 17Nov 16, 17[G11C]
2017/0323,690 CONTROLLER TO DETECT MALFUNCTIONING ADDRESS OF MEMORY DEVICEMay 19, 17Nov 09, 17[G11C]
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
9921751 Methods and systems for mapping a peripheral function onto a legacy memory interfaceJan 19, 16Mar 20, 18[G11C, G06F]
9923602 Configurable, power supply voltage referenced single-ended signaling with ESD protectionApr 25, 16Mar 20, 18[H04L, H02H, G06F, H04B]
9916877 Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory dieNov 30, 15Mar 13, 18[G11C, H01L]
9912469 Phase control block for managing multiple clock domains in systems with frequency offsetsDec 05, 16Mar 06, 18[H04L, H03L]
Expired/Abandoned/Withdrawn Patents
Patent #
Title
Status
Filing Date
Issue/Pub Date
Intl Class
2017/0054,576 Receiver with Clock Recovery Circuit and Adaptive Sample and Equalizer TimingABANSep 08, 16Feb 23, 17[H04L]
2015/0349,798 CONTROLLER THAT RECEIVES A CYCLIC REDUNDANCY CHECK (CRC) CODE FROM AN ELECTRICALLY ERASABLE PROGRAMMABLE MEMORY DEVICEABANAug 11, 15Dec 03, 15[G06F, H03M]
2015/0331,732 MEMORY DEVICE HAVING STORAGE FOR AN ERROR CODE CORRECTION EVENT COUNTABANMay 08, 15Nov 19, 15[G11C, G06F]
2014/0314,406 Systems and Methods for Temperature Insensitive Photonic TransmissionABANNov 30, 12Oct 23, 14[H04J, H04B]
2014/0098,589 REPLACEMENT OF A FAULTY MEMORY CELL WITH A SPARE CELL FOR A MEMORY CIRCUITABANSep 14, 12Apr 10, 14[G11C]
2014/0071,329 RECONFIGURABLE OPTICAL DEVICE USING A TOTAL INTERNAL REFLECTION (TIR) OPTICAL SWITCHABANSep 06, 13Mar 13, 14[H04N, G02B]
2014/0052,906 MEMORY CONTROLLER RESPONSIVE TO LATENCY-SENSITIVE APPLICATIONS AND MIXED-GRANULARITY ACCESS REQUESTSABANAug 05, 13Feb 20, 14[G11C, G06F]
2013/0346,822 ERROR DETECTION AND OFFSET CANCELLATION DURING MULTI-WIRE COMMUNICATIONABANJun 10, 13Dec 26, 13[H03M]
2013/0339,464 CONTACT AND IDENTITY MANAGEMENT IN A HETEROGENEOUS NETWORK WITH DISPARATE CLIENTSABANDec 13, 11Dec 19, 13[H04L]
2013/0290,494 SESSION MANAGEMENT FOR COMMUNICATION IN A HETEROGENEOUS NETWORKABANOct 20, 11Oct 31, 13[H04L]
2013/0168,674 Methods and Systems for Repairing Interior Device Layers in Three-Dimensional Integrated CircuitsABANDec 19, 12Jul 04, 13[H01L]
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