SANDISK 3D LLC

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Intl Class Technology # of Patents/ App Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 7974
 
 
 
G11C STATIC STORES 4021
 
 
 
B82Y SPECIFIC USES OR APPLICATIONS OF NANO-STRUCTURES; MEASUREMENT OR ANALYSIS OF NANO-STRUCTURES; MANUFACTURE  OR TREATMENT OF NANO-STRUCTURES435
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 3205
 
 
 
H01M PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY 278
 
 
 
H04W WIRELESS COMMUNICATION NETWORKS 197

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2014/0284,538 MEMORY CELLS HAVING STORAGE ELEMENTS THAT SHARE MATERIAL LAYERS WITH STEERING ELEMENTS AND METHODS OF FORMING THE SAMEJun 09, 14Sep 25, 14[H01L]
2014/0284,545 In-Situ Nitride Initiation Layer For RRAM Metal Oxide Switching MaterialApr 23, 14Sep 25, 14[H01L]
2014/0264,223 Metal Aluminum Nitride Embedded Resistors for Resistive Random Memory Access CellsMar 15, 13Sep 18, 14[H01L]
2014/0264,231 Confined Defect Profiling within Resistive Random Memory Access CellsMay 10, 13Sep 18, 14[H01L]
2014/0269,106 Program Cycle Skip Evaluation Before Write Operations In Non-Volatile MemoryMar 15, 13Sep 18, 14[G11C]
2014/0269,129 METHODS AND APPARATUS FOR REDUCING PROGRAMMING TIME OF A MEMORY CELLMay 29, 14Sep 18, 14[G11C]
2014/0272,576 METHODS AND APPARATUS FOR HIGH CAPACITY ANODES FOR LITHIUM BATTERIESMar 14, 13Sep 18, 14[H01M]
2014/0272,577 METHODS AND APPARATUS FOR HIGH CAPACITY ANODES FOR LITHIUM BATTERIESMar 14, 13Sep 18, 14[H01M]
2014/0281,135 Dynamic Address Grouping For Parallel Programming In Non-Volatile MemoryMar 15, 13Sep 18, 14[G06F]
2014/0252,298 METHODS AND APPARATUS FOR METAL OXIDE REVERSIBLE RESISTANCE-SWITCHING MEMORY DEVICESMar 10, 13Sep 11, 14[H01L]
2014/0252,454 VERTICAL BIT LINE TFT DECODER FOR HIGH VOLTAGE OPERATIONMar 07, 13Sep 11, 14[H01L]
2014/0254,231 3D Non-Volatile Memory Having Low-Current Cells and MethodsMar 04, 14Sep 11, 14[G11C, H01L]
2014/0254,242 NON-VOLATILE STORAGE SYSTEM BIASING CONDITIONS FOR STANDBY AND FIRST READMar 04, 14Sep 11, 14[G11C]
2014/0247,676 Charge Pump with a Power-Controlled Clock Buffer to Reduce Power Consumption and Output Voltage RippleApr 22, 14Sep 04, 14[G11C]
2014/0248,763 Vertical Bit Line Non-Volatile Memory Systems And Methods Of FabricationMar 04, 14Sep 04, 14[H01L]
2014/0250,260 ASYNCHRONOUS FIFO BUFFER FOR MEMORY ACCESSFeb 28, 14Sep 04, 14[G06F]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8,841,648 Multi-level memory arrays with memory cells that employ bipolar storage elements and methods of forming the sameOct 14, 10Sep 23, 14[G11C, H01L]
8,842,468 Load and short current measurement by current summation techniqueJan 30, 13Sep 23, 14[G11C]
8,835,892 Electronic devices including carbon nano-tube films having boron nitride-based liners, and methods of forming the sameOct 29, 09Sep 16, 14[G11C, H01L, B82Y]
8,836,412 Charge pump with a power-controlled clock buffer to reduce power consumption and output voltage rippleDec 09, 13Sep 16, 14[G05F, H03L]
8,823,076 Dense arrays and charge storage devicesMar 27, 14Sep 02, 14[H01L]
8,824,183 Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereofDec 12, 11Sep 02, 14[G11C]
8,824,191 Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereofAug 22, 13Sep 02, 14[G11C]
8,816,315 Memory cell that employs a selectively grown reversible resistance-switching element and methods of forming the sameFeb 11, 13Aug 26, 14[H01L]
8,817,514 Non-volatile memory having 3D array of read/write elements with low current structures and methods thereofJan 07, 14Aug 26, 14[G11C]
8,817,524 Resistive random access memory cells having metal alloy current limiting layersDec 20, 12Aug 26, 14[G11C, H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Filing Date Issue/Pub Date Intl Class
2013/0314,971 METHODS INVOLVING MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGENov 16, 12Nov 28, 13[G11C, H01L]
2013/0065,377 INTERFACE LAYER IMPROVEMENTS FOR NONVOLATILE MEMORY APPLICATIONSSep 09, 11Mar 14, 13[H01L]
2012/0223,414 METHODS FOR INCREASING BOTTOM ELECTRODE PERFORMANCE IN CARBON-BASED MEMORY DEVICESAug 08, 11Sep 06, 12[H01L, B82Y]
2012/0091,418 BIPOLAR STORAGE ELEMENTS FOR USE IN MEMORY CELLS AND METHODS OF FORMING THE SAMEOct 14, 10Apr 19, 12[H01L]
2011/0278,529 MEMORY EMPLOYING DIAMOND-LIKE CARBON RESISTIVITY-SWITCHABLE MATERIAL AND METHODS OF FORMING THE SAMEMay 14, 10Nov 17, 11[H01L]
2011/0210,306 MEMORY CELL THAT INCLUDES A CARBON-BASED MEMORY ELEMENT AND METHODS OF FORMING THE SAMEFeb 26, 10Sep 01, 11[H01L]
2011/0186,799 NON-VOLATILE MEMORY CELL CONTAINING NANODOTS AND METHOD OF MAKING THEREOFFeb 03, 11Aug 04, 11[H01L, B82Y]
2011/0156,044 DENSE ARRAYS AND CHARGE STORAGE DEVICESFeb 14, 11Jun 30, 11[H01L]
2010/0301,449 METHODS AND APPARATUS FOR FORMING LINE AND PILLAR STRUCTURES FOR THREE DIMENSIONAL MEMORY ARRAYS USING A DOUBLE SUBTRACTIVE PROCESS AND IMPRINT LITHOGRAPHYAug 13, 10Dec 02, 10[B29C, H01L]
2010/0283,053 NONVOLATILE MEMORY ARRAY COMPRISING SILICON-BASED DIODES FABRICATED AT LOW TEMPERATUREMay 11, 09Nov 11, 10[H01L]
2010/0102,291 CARBON-BASED MEMORY ELEMENTS EXHIBITING REDUCED DELAMINATION AND METHODS OF FORMING THE SAMEOct 22, 09Apr 29, 10[H01L]
2010/0078,758 MIIM DIODESSep 29, 08Apr 01, 10[G11C, H01L]
2010/0032,640 MEMORY CELL THAT INCLUDES A CARBON-BASED MEMORY ELEMENT AND METHODS OF FORMING THE SAMEAug 05, 09Feb 11, 10[H01L]
2010/0012,914 CARBON-BASED RESISTIVITY-SWITCHING MATERIALS AND METHODS OF FORMING THE SAMEJul 17, 09Jan 21, 10[H01L]
2010/0006,812 CARBON-BASED RESISTIVITY-SWITCHING MATERIALS AND METHODS OF FORMING THE SAMEJul 08, 09Jan 14, 10[H01L]
2009/0327,535 ADJUSTABLE READ LATENCY FOR MEMORY DEVICE IN PAGE-MODE ACCESSJun 30, 08Dec 31, 09[G06F]
2009/0282,267 PARTIAL SCRAMBLING TO REDUCE CORRELATIONJun 30, 08Nov 12, 09[H04L]
2009/0273,022 CONDUCTIVE HARD MASK TO PROTECT PATTERNED FEATURES DURING TRENCH ETCHJul 14, 09Nov 05, 09[H01L]
2009/0166,610 MEMORY CELL WITH PLANARIZED CARBON NANOTUBE LAYER AND METHODS OF FORMING THE SAMEDec 31, 07Jul 02, 09[H01L]
2009/0104,756 METHOD TO FORM A REWRITEABLE MEMORY CELL COMPRISING A DIODE AND A RESISTIVITY-SWITCHING GROWN OXIDEJun 29, 07Apr 23, 09[H01L]

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