SANDISK 3D LLC

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 45986
 
 
 
G11C STATIC STORES 35330
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 31377
 
 
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 1091
 
 
 
G03F PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR 982
 
 
 
B82Y SPECIFIC USES OR APPLICATIONS OF NANO-STRUCTURES; MEASUREMENT OR ANALYSIS OF NANO-STRUCTURES; MANUFACTURE  OR TREATMENT OF NANO-STRUCTURES638
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 575
 
 
 
C23C COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL 484
 
 
 
G06K RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS 2184
 
 
 
H01M PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY 2131

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2016/0027,477 INTERLEAVED GROUPED WORD LINES FOR THREE DIMESIONAL NON-VOLATILE STORAGEJul 25, 14Jan 28, 16[G11C]
2016/0019,952 INTRINSIC VERTICAL BIT LINE ARCHITECTUREMay 18, 15Jan 21, 16[G11C]
2016/0019,953 SETTING CHANNEL VOLTAGES USING A DUMMY WORD LINEMay 18, 15Jan 21, 16[G11C]
2016/0019,957 REDUCING DISTURB WITH ADJUSTABLE RESISTANCE BIT LINE STRUCTURESMay 18, 15Jan 21, 16[G11C]
2016/0019,960 OPERATION MODES FOR ADJUSTABLE RESISTANCE BIT LINE STRUCTURESMay 18, 15Jan 21, 16[G11C]
2016/0019,961 CONTROLLING ADJUSTABLE RESISTANCE BIT LINES CONNECTED TO WORD LINE COMBSMay 18, 15Jan 21, 16[G11C]
2016/0019,963 AUTO-TRACKING UNSELECTED WORD LINE VOLTAGE GENERATORMay 19, 15Jan 21, 16[G11C]
2016/0020,255 MEMORY HOLE BIT LINE STRUCTURESMay 18, 15Jan 21, 16[G11C, H01L]
2016/0020,388 Resistive switching by breaking and re-forming covalent bondsJul 21, 14Jan 21, 16[H01L]
2016/0020,389 SIDE WALL BIT LINE STRUCTURESMay 19, 15Jan 21, 16[H01L]
2016/0020,392 CURRENT-LIMITING ELECTRODESJul 21, 14Jan 21, 16[H01L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9,245,599 Timed multiplex sensingOct 20, 15Jan 26, 16[G11C]
9,246,085 Shaping ReRAM conductive filaments by controlling grain-boundary densityJul 23, 14Jan 26, 16[H01L]
9,246,091 ReRAM cells with diffusion-resistant metal silicon oxide layersJul 23, 14Jan 26, 16[H01L]
9,236,122 Shared-gate vertical-TFT for vertical bit line arrayJul 24, 14Jan 12, 16[G11C, H01L]
9,227,456 Memories with cylindrical read/write stacksMar 07, 13Jan 05, 16[B42D, G11C, H01L, A63F]
9,230,905 Trench multilevel contact to a 3D memory array and method of making thereofJan 08, 14Jan 05, 16[H01L]
9,230,985 Vertical TFT with tunnel barrierOct 15, 14Jan 05, 16[H01L]
9,224,466 Dual capacitor sense amplifier and methods thereforSep 29, 14Dec 29, 15[G11C]
9,224,951 Current-limiting electrodesJul 21, 14Dec 29, 15[H01L]
9,225,304 Single-stage folded cascode buffer amplifiers with analog comparatorsOct 24, 14Dec 29, 15[H03F]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2015/0070,965 FET LOW CURRENT 3D ReRAM NON-VOLATILE STORAGEABANSep 12, 13Mar 12, 15[G11C]
2014/0284,545 In-Situ Nitride Initiation Layer For RRAM Metal Oxide Switching MaterialABANApr 23, 14Sep 25, 14[H01L]
2014/0252,298 METHODS AND APPARATUS FOR METAL OXIDE REVERSIBLE RESISTANCE-SWITCHING MEMORY DEVICESABANMar 10, 13Sep 11, 14[H01L]
2014/0241,031 DIELECTRIC-BASED MEMORY CELLS HAVING MULTI-LEVEL ONE-TIME PROGRAMMABLE AND BI-LEVEL REWRITEABLE OPERATING MODES AND METHODS OF FORMING THE SAMEABANFeb 28, 13Aug 28, 14[G11C, H01L]
2014/0175,360 Bilayered Oxide Structures for ReRAM CellsABANDec 20, 12Jun 26, 14[H01L]
2014/0166,968 NONVOLATILE MEMORY CELL COMPRISING A DIODE AND A RESISTANCE-SWITCHING MATERIALABANFeb 19, 14Jun 19, 14[H01L]
2014/0119,858 Semiconductor Device Manufacturing LineABANSep 19, 13May 01, 14[H01L]
2014/0103,280 NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A PASSIVATED SWITCHING LAYERABANDec 18, 13Apr 17, 14[H01L]
2013/0334,484 Atomic Layer Deposition of Hafnium and Zirconium Oxides for Memory ApplicationsABANAug 21, 13Dec 19, 13[H01L]
2013/0314,971 METHODS INVOLVING MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGEABANNov 16, 12Nov 28, 13[G11C, H01L]
2013/0292,634 RESISTANCE-SWITCHING MEMORY CELLS HAVING REDUCED METAL MIGRATION AND LOW CURRENT OPERATION AND METHODS OF FORMING THE SAMEABANMay 07, 12Nov 07, 13[H01L]
2013/0181,181 MIIIM DIODE HAVING LANTHANUM OXIDEABANMar 06, 13Jul 18, 13[H01L]
2013/0148,404 ANTIFUSE-BASED MEMORY CELLS HAVING MULTIPLE MEMORY STATES AND METHODS OF FORMING THE SAMEABANDec 08, 11Jun 13, 13[G11C, H01L]
2013/0134,373 NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A NOVEL SWITCHING LAYERABANNov 28, 11May 30, 13[H01L]
2013/0126,821 BOTTOM ELECTRODES FOR USE WITH METAL OXIDE RESISTIVITY SWITCHING LAYERSABANJan 14, 13May 23, 13[H01L]
2013/0075,685 METHODS AND APPARATUS FOR INCLUDING AN AIR GAP IN CARBON-BASED MEMORY DEVICESABANSep 22, 11Mar 28, 13[H01L, B82Y]
2013/0065,377 INTERFACE LAYER IMPROVEMENTS FOR NONVOLATILE MEMORY APPLICATIONSABANSep 09, 11Mar 14, 13[H01L]
2012/0223,414 METHODS FOR INCREASING BOTTOM ELECTRODE PERFORMANCE IN CARBON-BASED MEMORY DEVICESABANAug 08, 11Sep 06, 12[H01L, B82Y]
2012/0091,418 BIPOLAR STORAGE ELEMENTS FOR USE IN MEMORY CELLS AND METHODS OF FORMING THE SAMEABANOct 14, 10Apr 19, 12[H01L]
2011/0297,912 Non-Volatile Memory Having 3d Array of Read/Write Elements with Vertical Bit Lines and Laterally Aligned Active Elements and Methods ThereofABANJun 01, 11Dec 08, 11[H01L]

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