SANDISK 3D LLC

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 44986
 
 
 
G11C STATIC STORES 33627
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 30369
 
 
 
G03F PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR 1082
 
 
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 1087
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 568
 
 
 
B82Y SPECIFIC USES OR APPLICATIONS OF NANO-STRUCTURES; MEASUREMENT OR ANALYSIS OF NANO-STRUCTURES; MANUFACTURE  OR TREATMENT OF NANO-STRUCTURES537
 
 
 
C23C COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL 380
 
 
 
G06K RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS 2173
 
 
 
H01M PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY 2131

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2015/0179,659 MULTILEVEL CONTACT TO A 3D MEMORY ARRAY AND METHOD OF MAKING THEREOFDec 20, 13Jun 25, 15[H01L]
2015/0170,742 Method Of Operating FET Low Current 3D Re-RamJan 07, 15Jun 18, 15[G11C]
2015/0162,338 Methods of Forming Sidewall GatesDec 06, 13Jun 11, 15[H01L]
2015/0131,360 VERTICAL 1T-1R MEMORY CELLS, MEMORY ARRAYS AND METHODS OF FORMING THE SAMENov 08, 13May 14, 15[G11C, H01L]
2015/0106,554 Regrouping and Skipping Cycles in Non-Volatile MemoryOct 15, 14Apr 16, 15[G11C, G06F]
2015/0093,876 Doped Oxide Dielectrics for Resistive Random Access Memory CellsDec 10, 14Apr 02, 15[H01L]
2015/0069,320 VERTICAL BIT LINE WIDE BAND GAP TFT DECODERSep 06, 13Mar 12, 15[H01L]
2015/0070,965 FET LOW CURRENT 3D ReRAM NON-VOLATILE STORAGESep 12, 13Mar 12, 15[G11C]
2015/0036,414 SHARED-GATE VERTICAL-TFT FOR VERTICAL BIT LINE ARRAYJul 24, 14Feb 05, 15[G11C, H01L]
2014/0369,132 DIFFERENTIAL CURRENT SENSE AMPLIFIER AND METHOD FOR NON-VOLATILE MEMORYJun 14, 13Dec 18, 14[G11C]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9,064,547 3D non-volatile memory having low-current cells and methodsMar 04, 14Jun 23, 15[G11C, H01L]
9,065,040 Controlling composition of multiple oxides in resistive switching layers using atomic layer depositionOct 09, 14Jun 23, 15[H01L]
9,065,044 Three dimensional non-volatile storage with connected word linesDec 12, 11Jun 23, 15[G11C, H01L]
9,059,401 Three dimensional non-volatile storage with three device driver for row selectDec 12, 11Jun 16, 15[G11C, H01L]
9,053,766 Three dimensional memory system with intelligent select circuitMar 03, 11Jun 09, 15[G11C]
9,054,307 Resistive random access memory cells having metal alloy current limiting layersJun 27, 14Jun 09, 15[G11C, H01L]
9,054,308 Plasma reduction method for modifying metal oxide stoichiometry in ReRAMMar 04, 14Jun 09, 15[H01L]
9,047,940 Resistive random access memory cells having variable switching characteristicsJan 10, 13Jun 02, 15[G11C, H01L]
9,047,943 Non-volatile storage system biasing conditions for standby and first readMar 04, 14Jun 02, 15[G11C, H01L]
9,047,949 Non-volatile storage system using opposite polarity programming signals for MIM memory cellMar 17, 14Jun 02, 15[G11C, H01L, B82Y]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2014/0252,298 METHODS AND APPARATUS FOR METAL OXIDE REVERSIBLE RESISTANCE-SWITCHING MEMORY DEVICESABANMar 10, 13Sep 11, 14[H01L]
2014/0103,280 NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A PASSIVATED SWITCHING LAYERABANDec 18, 13Apr 17, 14[H01L]
2013/0334,484 Atomic Layer Deposition of Hafnium and Zirconium Oxides for Memory ApplicationsABANAug 21, 13Dec 19, 13[H01L]
2013/0314,971 METHODS INVOLVING MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGEABANNov 16, 12Nov 28, 13[G11C, H01L]
2013/0292,634 RESISTANCE-SWITCHING MEMORY CELLS HAVING REDUCED METAL MIGRATION AND LOW CURRENT OPERATION AND METHODS OF FORMING THE SAMEABANMay 07, 12Nov 07, 13[H01L]
2013/0148,404 ANTIFUSE-BASED MEMORY CELLS HAVING MULTIPLE MEMORY STATES AND METHODS OF FORMING THE SAMEABANDec 08, 11Jun 13, 13[G11C, H01L]
2013/0134,373 NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A NOVEL SWITCHING LAYERABANNov 28, 11May 30, 13[H01L]
2013/0126,821 BOTTOM ELECTRODES FOR USE WITH METAL OXIDE RESISTIVITY SWITCHING LAYERSABANJan 14, 13May 23, 13[H01L]
2013/0075,685 METHODS AND APPARATUS FOR INCLUDING AN AIR GAP IN CARBON-BASED MEMORY DEVICESABANSep 22, 11Mar 28, 13[H01L, B82Y]
2013/0065,377 INTERFACE LAYER IMPROVEMENTS FOR NONVOLATILE MEMORY APPLICATIONSABANSep 09, 11Mar 14, 13[H01L]
2012/0223,414 METHODS FOR INCREASING BOTTOM ELECTRODE PERFORMANCE IN CARBON-BASED MEMORY DEVICESABANAug 08, 11Sep 06, 12[H01L, B82Y]
2012/0091,418 BIPOLAR STORAGE ELEMENTS FOR USE IN MEMORY CELLS AND METHODS OF FORMING THE SAMEABANOct 14, 10Apr 19, 12[H01L]
2011/0297,912 Non-Volatile Memory Having 3d Array of Read/Write Elements with Vertical Bit Lines and Laterally Aligned Active Elements and Methods ThereofABANJun 01, 11Dec 08, 11[H01L]
2011/0278,529 MEMORY EMPLOYING DIAMOND-LIKE CARBON RESISTIVITY-SWITCHABLE MATERIAL AND METHODS OF FORMING THE SAMEABANMay 14, 10Nov 17, 11[H01L]
2011/0210,306 MEMORY CELL THAT INCLUDES A CARBON-BASED MEMORY ELEMENT AND METHODS OF FORMING THE SAMEABANFeb 26, 10Sep 01, 11[H01L]
2011/0186,799 NON-VOLATILE MEMORY CELL CONTAINING NANODOTS AND METHOD OF MAKING THEREOFABANFeb 03, 11Aug 04, 11[H01L, B82Y]
2011/0156,044 DENSE ARRAYS AND CHARGE STORAGE DEVICESABANFeb 14, 11Jun 30, 11[H01L]
7,924,602 Method to program a memory cell comprising a carbon nanotube fabric element and a steering elementExpiredJan 26, 10Apr 12, 11[G11C]
2010/0301,449 METHODS AND APPARATUS FOR FORMING LINE AND PILLAR STRUCTURES FOR THREE DIMENSIONAL MEMORY ARRAYS USING A DOUBLE SUBTRACTIVE PROCESS AND IMPRINT LITHOGRAPHYABANAug 13, 10Dec 02, 10[B29C, H01L]
2010/0283,053 NONVOLATILE MEMORY ARRAY COMPRISING SILICON-BASED DIODES FABRICATED AT LOW TEMPERATUREABANMay 11, 09Nov 11, 10[H01L]

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