SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 90453
 
 
 
G11C STATIC STORES 39112
 
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 35412
 
 
 
G03F PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR 3273
 
 
 
H03K PULSE TECHNIQUE 31100
 
 
 
B81C PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICRO-STRUCTURAL DEVICES OR SYSTEMS 2511
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 25134
 
 
 
B81B MICRO-STRUCTURAL DEVICES OR SYSTEMS, e.g. MICRO-MECHANICAL DEVICES 2412
 
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 1862
 
 
 
B24B MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING 1353

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0068,866 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOFAug 24, 17Mar 08, 18[H01L]
2018/0068,880 DIE SORTING APPARATUS AND DIE SORTING METHODAug 25, 17Mar 08, 18[H01L]
2018/0068,961 PROTECTION CIRCUIT AND INTEGRATED CIRCUITAug 29, 17Mar 08, 18[H01L]
2018/0069,093 SEMICONDUCTOR DEVICE LAYOUT STRUCTURE AND MANUFACTURING METHOD THEREOFJul 13, 17Mar 08, 18[G11C, H01L]
2018/0061,714 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOFAug 16, 17Mar 01, 18[H01L]
2018/0061,716 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOFAug 18, 17Mar 01, 18[H01L]
2018/0061,846 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOFAug 22, 17Mar 01, 18[H01L]
2018/0047,623 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOFAug 02, 17Feb 15, 18[H01L]
2018/0047,632 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOFAug 09, 17Feb 15, 18[H01L]
2018/0040,604 DIODE DESIGN OF FINFET DEVICEMay 23, 17Feb 08, 18[H01L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9919918 Wafer-level bonding packaging method and wafer structureJul 19, 16Mar 20, 18[B81C, B81B]
9922878 Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturingDec 11, 12Mar 20, 18[H01L]
9922980 Method and device for reducing FinFET self-heating effectSep 29, 16Mar 20, 18[H01L]
9922985 Semiconductor memory device and fabrication method thereofMar 08, 17Mar 20, 18[H01L]
9923027 Structure and method for memory cell arrayJun 16, 17Mar 20, 18[H01L]
9923065 Fabricating method of fin-type semiconductor deviceJul 18, 16Mar 20, 18[H01L]
9923100 Flash memory structure and fabrication method thereofMar 08, 17Mar 20, 18[H01L]
9915519 Measuring system and measuring methodJun 23, 16Mar 13, 18[G02B, G01B]
9917030 Semiconductor structure and fabrication method thereofJan 09, 17Mar 13, 18[H01L]
9911593 NAND flash memory and fabrication methods thereofAug 23, 16Mar 06, 18[H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2016/0203,855 MEMORY DEVICE, RELATED METHOD, AND RELATED ELECTRONIC DEVICEAbandonedDec 31, 15Jul 14, 16[G11C, H01L]
2016/0204,066 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOFAbandonedJan 11, 16Jul 14, 16[H01L]
2016/0140,279 METHOD AND DEVICE FOR DESIGNING ELECTRICAL CIRCUITAbandonedNov 04, 15May 19, 16[G06F]
2016/0093,649 SEMICONDUCTOR DEVICE AND RELATED MANUFACTURING METHODAbandonedSep 24, 15Mar 31, 16[H01L]
2016/0071,797 EFUSE STRUCTURE WITH STRESSED LAYERAbandonedAug 10, 15Mar 10, 16[H01L]
2016/0013,051 SEMICONDUCTOR DEVICE AND RELATED MANUFACTURING METHODAbandonedJun 24, 15Jan 14, 16[H01L]
2016/0005,736 INGAAS FINFET ON PATTERNED SILICON SUBSTRATE WITH INP AS A BUFFER LAYERAbandonedMar 12, 15Jan 07, 16[H01L]
2015/0368,095 DOUBLE-SIDE PROCESS SILICON MOS AND PASSIVE DEVICES FOR RF FRONT-END MODULESAbandonedAug 28, 15Dec 24, 15[B81C]
2015/0371,134 PREDICTING CIRCUIT RELIABILITY AND YIELD USING NEURAL NETWORKSAbandonedJun 10, 15Dec 24, 15[G06N]
2015/0311,125 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEAbandonedJan 09, 15Oct 29, 15[H01L]
2015/0303,279 Method of Forming Tungsten Nitride Layer of Tungsten GateAbandonedMar 27, 15Oct 22, 15[H01L]
2015/0270,234 PAD STRUCTURE FOR SEMICONDUCTOR DEVICE CONNECTIONAbandonedMar 13, 15Sep 24, 15[H01L]
2015/0263,020 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEAbandonedFeb 02, 15Sep 17, 15[H01L]
2015/0169,820 WEAK POINTS AUTO-CORRECTION PROCESS FOR OPC TAPE-OUTAbandonedSep 30, 14Jun 18, 15[G06F]
2015/0129,926 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFAbandonedFeb 14, 14May 14, 15[H01L]
2015/0041,948 SEMICONDUCTOR DEVICE INCLUDING STI STRUCTURE AND METHOD FOR FORMING THE SAMEAbandonedJul 29, 14Feb 12, 15[H01L]
2014/0191,301 TRANSISTOR AND FABRICATION METHODAbandonedNov 22, 13Jul 10, 14[H01L]
2014/0175,580 MAGNETORESISTIVE MEMORY DEVICE AND FABRICTAION METHODAbandonedOct 17, 13Jun 26, 14[H01L]
2014/0167,210 SEMICONDUCTOR STRUCTURE AND FABRICATION METHODAbandonedMay 18, 13Jun 19, 14[H01L]
2014/0149,954 STRESS EFFECT MODEL OPTIMIZATION IN INTEGRATED CIRCUIT SPICE MODELAbandonedJul 16, 13May 29, 14[G06F]

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