SPANSION LLC

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Technologies

Intl Class Technology # of Patents Rank
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 1054 29
 
 
G11C STATIC STORES 735 14
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 183 166
 
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 83 24
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 59 73
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 40 35
 
 
H03K PULSE TECHNIQUE 37 68
 
 
H03F AMPLIFIERS 21 50
 
 
H02J CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY 20 49
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 18 158
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Top Patents (by citation)

Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2014/0097,497 Spacer Design to Prevent Trapped Electrons Oct 04, 12 Apr 10, 14 [H01L]
2014/0097,820 Output Voltage Controller, Electronic Device, and Output Voltage Control Method Dec 16, 13 Apr 10, 14 [H02M]
2014/0098,624 Supply Power Dependent Controllable Write Throughput for Memory Applications Oct 04, 12 Apr 10, 14 [G11C]
2014/0092,687 METHOD, APPARATUS, AND MANUFACTURE FOR STAGGERED START FOR MEMORY MODULE Dec 06, 13 Apr 03, 14 [G11C]
2014/0094,001 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Oct 30, 13 Apr 03, 14 [H01L]
2014/0085,555 Voltage Adjustment Circuit and Display Device Driving Circuit Nov 25, 13 Mar 27, 14 [G02F]
2014/0089,937 PROCESSOR SYSTEM OPTIMIZATION Nov 27, 13 Mar 27, 14 [G06F]
2014/0077,347 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF Dec 21, 12 Mar 20, 14 [H01L]
2014/0077,783 ADJUSTING APPARATUS AND ADJUSTMENT METHOD Jul 15, 13 Mar 20, 14 [H02M]
2014/0070,840 Semiconductor Integrated Circuit, Operating Method of Semiconductor Integrated Circuit, and Debug System Nov 15, 13 Mar 13, 14 [G01R]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8,691,645 Method of manufacturing convex shaped thin-film transistor device Aug 10, 12 Apr 08, 14 [H01L]
8,691,647 Memory devices containing a high-K dielectric layer Aug 27, 04 Apr 08, 14 [H01L]
8,692,310 Gate fringing effect based channel formation for semiconductor device Feb 09, 09 Apr 08, 14 [H01L]
8,694,714 Retargeting of a write operation retry in the event of a write operation failure Jan 18, 08 Apr 08, 14 [G11C, G06F]
8,694,776 Authenticated memory and controller slave Dec 21, 07 Apr 08, 14 [H04L, G06F]
8,686,492 Non-volatile FINFET memory device and manufacturing method thereof Mar 11, 10 Apr 01, 14 [H01L]
8,680,671 Self-aligned double patterning for memory and other microelectronic devices Jan 28, 09 Mar 25, 14 [H01L]
8,680,686 Method and system for thin multi chip stack package with film on wire and copper wire Jun 29, 10 Mar 25, 14 [H01L]
8,680,832 Control circuit of step-down DC-DC converter, control circuit of step-up DC-DC converter and step-up/step-down DC-DC converter Nov 27, 12 Mar 25, 14 [G05F]
8,681,558 Parallel bitline nonvolatile memory employing channel-based processing technology Oct 07, 09 Mar 25, 14 [G11C]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Filing Date Issue/Pub Date Intl Class
2010/0155,611 RADIATION-DETECTING STRUCTURES Dec 19, 08 Jun 24, 10 [G01T]
7,683,440 Semiconductor memory device Jan 23, 07 Mar 23, 10 [H01L]
2010/0059,762 HEAT REMOVAL FACILITATED WITH DIAMOND-LIKE CARBON LAYER IN SOI STRUCTURES Sep 08, 08 Mar 11, 10 [H01L]
2009/0189,212 ELECTRONIC DEVICE HAVING A DOPED REGION WITH A GROUP 13 ATOM Jan 30, 08 Jul 30, 09 [H01L]
2009/0159,958 ELECTRONIC DEVICE INCLUDING A SILICON NITRIDE LAYER AND A PROCESS OF FORMING THE SAME Dec 20, 07 Jun 25, 09 [H01L]
2009/0154,215 REDUCING NOISE AND DISTURBANCE BETWEEN MEMORY STORAGE ELEMENTS USING ANGLED WORDLINES Dec 14, 07 Jun 18, 09 [G11C]
2009/0050,471 PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING LAYERS WITHIN OPENINGS Aug 24, 07 Feb 26, 09 [C23C]
2009/0029,202 FUEL CELL USING DEUTERIUM Jul 27, 07 Jan 29, 09 [H01M]
2009/0001,573 Structure and method for wire bond integrity check on BGA substrates using indirect electrical interconnectivity pathway between wire bonds and ground Jan 08, 07 Jan 01, 09 [B23K, H01L]
2008/0310,237 CMOS Compatible Single-Poly Non-Volatile Memory Jun 18, 07 Dec 18, 08 [G11C]
2008/0265,309 Semiconductor memory device and manufacturing method thereof Jun 20, 08 Oct 30, 08 [H01L]
2008/0233,663 SINGULATED BARE DIE TESTING Aug 08, 07 Sep 25, 08 [G01R, H01L]
2008/0228,998 MEMORY STORAGE VIA AN INTERNAL COMPRESSION ALGORITHM Mar 16, 07 Sep 18, 08 [G06F]
2008/0157,289 METHOD TO ACHIEVE A LOW COST TRANSISTOR ISOLATION DIELECTRIC PROCESS MODULE WITH IMPROVED PROCESS CONTROL, PROCESS COST, AND YIELD POTENTIAL Dec 27, 06 Jul 03, 08 [H01L]
2008/0150,000 MEMORY SYSTEM WITH SELECT GATE ERASE Dec 21, 06 Jun 26, 08 [H01L]
2008/0150,005 MEMORY SYSTEM WITH DEPLETION GATE Mar 30, 07 Jun 26, 08 [H01L]
2008/0153,224 INTEGRATED CIRCUIT SYSTEM WITH MEMORY SYSTEM Apr 13, 07 Jun 26, 08 [H01L]
2008/0153,236 FLASH MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME Dec 22, 06 Jun 26, 08 [H01L]
2008/0142,874 INTEGRATED CIRCUIT SYSTEM WITH IMPLANT OXIDE Dec 16, 06 Jun 19, 08 [H01L]
2008/0148,414 PORTABLE DIGITAL RIGHTS MANAGEMENT (DRM) Dec 19, 06 Jun 19, 08 [G06F]

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