SPANSION LLC

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology MATTERS Rank in Class
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 1214 29
 
 
G11C STATIC STORES 772 16
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 259 179
 
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 95 25
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 60 84
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 43 37
 
 
H03K PULSE TECHNIQUE 40 81
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 29 191
 
 
H02J CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY 21 69
 
 
H03F AMPLIFIERS 21 54
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Top Patents (by citation)

Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2015/0054,554 APPARATUS AND METHOD FOR SMART VCC TRIP POINT DESIGN FOR TESTABILITY Aug 21, 13 Feb 26, 15 [H03K]
2015/0056,726 CHIP POSITIONING IN MULTI-CHIP PACKAGE Nov 04, 14 Feb 26, 15 [H01L]
2015/0035,044 Method to Improve Charge Trap Flash Memory Core Cell Performance and Reliability Sep 15, 14 Feb 05, 15 [H01L]
2015/0017,795 Non-Volatile Memory With Silicided Bit Line Contacts Sep 30, 14 Jan 15, 15 [H01L]
2015/0001,611 SEMICONDUCTOR DEVICE, METHOD OF CONTROLLING THE SAME, AND METHOD OF MANUFACTURING THE SAME Mar 21, 14 Jan 01, 15 [G11C, H01L]
2014/0369,141 Screening for Reference Cells in a Memory Jun 13, 13 Dec 18, 14 [G11C]
2014/0370,698 Non-Volatile Finfet Memory Array and Manufacturing Method Thereof Oct 11, 13 Dec 18, 14 [H01L]
2014/0365,744 Programmable Latency Count to Achieve Higher Memory Bandwidth Jun 10, 13 Dec 11, 14 [G06F]
2014/0357,044 METAL-INSUALTOR-METAL (MIM) DEVICE AND METHOD OF FORMATION THEREROF Aug 14, 14 Dec 04, 14 [H01L]
2014/0351,466 HOST/CLIENT SYSTEM HAVING A SCALABLE SERIAL BUS INTERFACE Aug 06, 14 Nov 27, 14 [G06F]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8,964,484 For test (DFT) read speed through transition detector in built-in self-test (BIST) sort Dec 28, 12 Feb 24, 15 [G11C]
8,966,151 Apparatus and method for a reduced pin count (RPC) memory bus interface including a read data strobe signal Mar 30, 12 Feb 24, 15 [G06F]
8,957,472 Memory device having trapezoidal bitlines and method of fabricating same Jan 24, 12 Feb 17, 15 [H01L]
8,957,648 Output switching circuit May 27, 11 Feb 17, 15 [H03K, G05F, H02M]
8,952,536 Semiconductor device and method of fabrication Aug 27, 08 Feb 10, 15 [H01L]
8,946,020 Method of forming controllably conductive oxide Sep 06, 07 Feb 03, 15 [H01L]
8,946,663 Soft error resistant circuitry May 15, 12 Feb 03, 15 [H01L]
8,938,655 Extending flash memory data retension via rewrite refresh Dec 20, 07 Jan 20, 15 [G11C]
8,933,682 Bandgap voltage reference circuit Aug 10, 10 Jan 13, 15 [G05F]
8,928,177 Control circuit and electronic device Feb 25, 11 Jan 06, 15 [H03D, G05F, H02M, H02J]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Filing Date Issue/Pub Date Intl Class
8,698,465 Control circuit for power supply including a detection circuit and a regulation circuit for regulating switching timing Apr 15, 11 Apr 15, 14 [G05F]
8,598,851 Charging circuit Feb 18, 10 Dec 03, 13 [H02J]
2011/0221,006 NAND ARRAY SOURCE/DRAIN DOPING SCHEME Mar 11, 10 Sep 15, 11 [H01L]
2010/0155,611 RADIATION-DETECTING STRUCTURES Dec 19, 08 Jun 24, 10 [G01T]
2010/0142,562 INTERFACE APPARATUS AND RESYNCHRONIZATION METHOD Nov 24, 09 Jun 10, 10 [H04J, G06F, H04B]
7,683,440 Semiconductor memory device Jan 23, 07 Mar 23, 10 [H01L]
2010/0059,762 HEAT REMOVAL FACILITATED WITH DIAMOND-LIKE CARBON LAYER IN SOI STRUCTURES Sep 08, 08 Mar 11, 10 [H01L]
2010/0055,809 PROCESS OF FABRICATING A WORKPIECE USING A TEST MASK Sep 08, 08 Mar 04, 10 [H01L]
2009/0261,406 USE OF SILICON-RICH NITRIDE IN A FLASH MEMORY DEVICE Apr 17, 08 Oct 22, 09 [H01L]
2009/0189,212 ELECTRONIC DEVICE HAVING A DOPED REGION WITH A GROUP 13 ATOM Jan 30, 08 Jul 30, 09 [H01L]
2009/0159,958 ELECTRONIC DEVICE INCLUDING A SILICON NITRIDE LAYER AND A PROCESS OF FORMING THE SAME Dec 20, 07 Jun 25, 09 [H01L]
2009/0164,703 FLEXIBLE FLASH INTERFACE Dec 21, 07 Jun 25, 09 [G06F]
2009/0154,215 REDUCING NOISE AND DISTURBANCE BETWEEN MEMORY STORAGE ELEMENTS USING ANGLED WORDLINES Dec 14, 07 Jun 18, 09 [G11C]
2009/0114,542 PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING A CONDUCTIVE LAYER OVER A SEED LAYER Nov 06, 07 May 07, 09 [C25D]
2009/0050,471 PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING LAYERS WITHIN OPENINGS Aug 24, 07 Feb 26, 09 [C23C]
2009/0029,202 FUEL CELL USING DEUTERIUM Jul 27, 07 Jan 29, 09 [H01M]
2009/0001,573 Structure and method for wire bond integrity check on BGA substrates using indirect electrical interconnectivity pathway between wire bonds and ground Jan 08, 07 Jan 01, 09 [B23K, H01L]
2008/0310,237 CMOS Compatible Single-Poly Non-Volatile Memory Jun 18, 07 Dec 18, 08 [G11C]
2008/0265,309 Semiconductor memory device and manufacturing method thereof Jun 20, 08 Oct 30, 08 [H01L]
2008/0233,663 SINGULATED BARE DIE TESTING Aug 08, 07 Sep 25, 08 [G01R, H01L]

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