SPANSION LLC

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Technologies

Intl Class Technology # of Patents/ App Rank in Class
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 1156 31
 
 
G11C STATIC STORES 751 15
 
 
G06F ELECTRIC DIGITAL DATA PROCESSING 235 174
 
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 91 25
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 60 80
 
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 41 35
 
 
H03K PULSE TECHNIQUE 37 86
 
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 24 173
 
 
H03F AMPLIFIERS 21 60
 
 
H02J CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY 20 65
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Top Patents (by citation)

Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2014/0201,403 DEBUG CONTROL CIRCUIT Mar 18, 14 Jul 17, 14 [G06F]
2014/0191,308 SELF-ALIGNED DOUBLE PATTERNING FOR MEMORY AND OTHER MICROELECTRONIC DEVICES Mar 11, 14 Jul 10, 14 [H01L]
2014/0191,417 Multi-Chip Package Assembly with Improved Bond Wire Separation Jan 07, 13 Jul 10, 14 [H01L]
2014/0192,581 PROGRAMMABLE AND FLEXIBLE REFERENCE CELL SELECTION METHOD FOR MEMORY DEVICES Jan 09, 13 Jul 10, 14 [G11C]
2014/0193,972 Buried Hard Mask for Embedded Semiconductor Device Patterning Jan 07, 13 Jul 10, 14 [H01L]
2014/0195,233 Distributed Speech Recognition System Jan 08, 13 Jul 10, 14 [G10L]
2014/0185,393 DESIGN FOR TEST (DFT) READ SPEED THROUGH TRANSITION DETECTOR IN BUILT-IN SELF-TEST (BIST) SORT Dec 28, 12 Jul 03, 14 [G11C]
2014/0175,613 Chip Positioning in Multi-Chip Package Dec 21, 12 Jun 26, 14 [H01L]
2014/0177,375 Memory Device with Internal Combination Logic Dec 21, 12 Jun 26, 14 [G11C]
2014/0180,690 Hybrid Hashing Scheme for Active HMMS Dec 21, 12 Jun 26, 14 [G10L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8,785,268 Memory system with Fin FET technology Dec 21, 06 Jul 22, 14 [H01L]
8,785,275 Non-volatile FINFET memory device and manufacturing method thereof Feb 03, 14 Jul 22, 14 [H01L]
8,786,358 Reference voltage circuit and semiconductor integrated circuit Feb 28, 11 Jul 22, 14 [G05F]
8,787,089 Semiconductor device and method of controlling the same Dec 03, 12 Jul 22, 14 [G11C]
8,788,740 Data commit on multicycle pass complete without error Dec 21, 07 Jul 22, 14 [G06F]
8,772,953 Semiconductor device and programming method Mar 13, 09 Jul 08, 14 [B29C, H01L]
8,773,885 Semiconductor memory device featuring selective data storage in a stacked memory cell structure Sep 19, 12 Jul 08, 14 [G11C]
8,774,400 Method for protecting data against differntial fault analysis involved in rivest, shamir, and adleman cryptography using the chinese remainder theorem Jan 03, 08 Jul 08, 14 [H04K]
8,775,853 Device and method for preventing lost synchronization Apr 16, 13 Jul 08, 14 [H04L, G06F]
8,765,529 Semiconductor device and method for manufacturing the same Oct 30, 13 Jul 01, 14 [H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Filing Date Issue/Pub Date Intl Class
8,598,851 Charging circuit Feb 18, 10 Dec 03, 13 [H02J]
2012/0076,142 PACKET COMMUNICATION DEVICE AND PACKET COMMUNICATION METHOD Dec 07, 11 Mar 29, 12 [H04L]
2011/0221,006 NAND ARRAY SOURCE/DRAIN DOPING SCHEME Mar 11, 10 Sep 15, 11 [H01L]
2010/0155,611 RADIATION-DETECTING STRUCTURES Dec 19, 08 Jun 24, 10 [G01T]
7,683,440 Semiconductor memory device Jan 23, 07 Mar 23, 10 [H01L]
2010/0059,762 HEAT REMOVAL FACILITATED WITH DIAMOND-LIKE CARBON LAYER IN SOI STRUCTURES Sep 08, 08 Mar 11, 10 [H01L]
2010/0055,809 PROCESS OF FABRICATING A WORKPIECE USING A TEST MASK Sep 08, 08 Mar 04, 10 [H01L]
2009/0261,406 USE OF SILICON-RICH NITRIDE IN A FLASH MEMORY DEVICE Apr 17, 08 Oct 22, 09 [H01L]
2009/0189,212 ELECTRONIC DEVICE HAVING A DOPED REGION WITH A GROUP 13 ATOM Jan 30, 08 Jul 30, 09 [H01L]
2009/0159,958 ELECTRONIC DEVICE INCLUDING A SILICON NITRIDE LAYER AND A PROCESS OF FORMING THE SAME Dec 20, 07 Jun 25, 09 [H01L]
2009/0164,703 FLEXIBLE FLASH INTERFACE Dec 21, 07 Jun 25, 09 [G06F]
2009/0154,215 REDUCING NOISE AND DISTURBANCE BETWEEN MEMORY STORAGE ELEMENTS USING ANGLED WORDLINES Dec 14, 07 Jun 18, 09 [G11C]
2009/0114,542 PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING A CONDUCTIVE LAYER OVER A SEED LAYER Nov 06, 07 May 07, 09 [C25D]
2009/0050,471 PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING LAYERS WITHIN OPENINGS Aug 24, 07 Feb 26, 09 [C23C]
2009/0029,202 FUEL CELL USING DEUTERIUM Jul 27, 07 Jan 29, 09 [H01M]
2009/0001,573 Structure and method for wire bond integrity check on BGA substrates using indirect electrical interconnectivity pathway between wire bonds and ground Jan 08, 07 Jan 01, 09 [B23K, H01L]
2008/0310,237 CMOS Compatible Single-Poly Non-Volatile Memory Jun 18, 07 Dec 18, 08 [G11C]
2008/0265,309 Semiconductor memory device and manufacturing method thereof Jun 20, 08 Oct 30, 08 [H01L]
2008/0233,663 SINGULATED BARE DIE TESTING Aug 08, 07 Sep 25, 08 [G01R, H01L]
2008/0228,998 MEMORY STORAGE VIA AN INTERNAL COMPRESSION ALGORITHM Mar 16, 07 Sep 18, 08 [G06F]

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