STATS ChipPAC, Ltd.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 160025
 
 
 
H05K PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS 4695
 
 
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 16133
 
 
 
H03H IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS 1351
 
 
 
H01R ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS 9114
 
 
 
B23K SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM 773
 
 
 
B32B LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM4144
 
 
 
H01F MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES 469
 
 
 
H01P WAVEGUIDES; RESONATORS, LINES OR OTHER DEVICES OF THE WAVEGUIDE TYPE 450
 
 
 
B08B CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL 248

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2015/0228,552 Semiconductor Device and Method of Forming Insulating Layer Disposed Over the Semiconductor Die For Stress ReliefApr 27, 15Aug 13, 15[H01L]
2015/0228,590 Semiconductor Device and Method of Mounting Semiconductor Die to Heat Spreader on Temporary Carrier and Forming Polymer Layer and Conductive Layer Over the DieApr 28, 15Aug 13, 15[H01L]
2015/0228,628 Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat DissipationApr 23, 15Aug 13, 15[H01L]
2015/0214,182 Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder MaskApr 09, 15Jul 30, 15[H01L]
2015/0179,481 Semiconductor Device and Method of Making Embedded Wafer Level Chip Scale PackagesDec 23, 13Jun 25, 15[H01L]
2015/0179,544 Semiconductor Device and Method of Wafer Thinning Involving Edge Trimming and CMPDec 19, 13Jun 25, 15[H01L]
2015/0179,555 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIALESS SUBSTRATE AND METHOD OF MANUFACTURE THEREOFDec 20, 13Jun 25, 15[H01L]
2015/0179,570 Semiconductor Device and Method of Forming Fine Pitch RDL Over Semiconductor Die in Fan-Out PackageDec 23, 13Jun 25, 15[H01L]
2015/0179,587 Semiconductor Device and Method of Forming Stress Relief Layer Between Die and Interconnect StructureMar 03, 15Jun 25, 15[H01L]
2015/0179,602 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE INK AND METHOD OF MANUFACTURE THEREOFDec 20, 13Jun 25, 15[H01L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9,117,812 Semiconductor device and method of forming non-linear interconnect layer with extended length for joint reliabilityDec 23, 13Aug 25, 15[H01L]
9,105,532 Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structureOct 01, 14Aug 11, 15[H01L]
9,105,620 Integrated circuit packaging system with routable traces and method of manufacture thereofSep 26, 13Aug 11, 15[H01L]
9,105,647 Method of forming perforated opening in bottom substrate of flipchip pop assembly to reduce bleeding of underfill materialMay 17, 10Aug 11, 15[H01L]
9,099,455 Semiconductor device and method of forming conductive posts embedded in photosensitive encapsulantNov 21, 12Aug 04, 15[H01L]
9,093,278 Method of manufacture of integrated circuit packaging system with plasma processingDec 20, 13Jul 28, 15[H01L]
9,093,364 Integrated circuit packaging system with exposed vertical interconnects and method of manufacture thereofJun 22, 11Jul 28, 15[H01L]
9,093,391 Integrated circuit packaging system with fan-in package and method of manufacture thereofSep 17, 09Jul 28, 15[H01L]
9,093,392 Integrated circuit packaging system with vertical interconnection and method of manufacture thereofDec 10, 10Jul 28, 15[H01L]
9,093,415 Integrated circuit packaging system with heat spreader and method of manufacture thereofSep 25, 13Jul 28, 15[H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
8,900,920 Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layerWithdrawnAug 11, 11Dec 02, 14[H01L, H05K]
2013/0249,076 Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent TracesABANMar 20, 12Sep 26, 13[H01L]
2013/0001,762 Semiconductor Device and Method of Using Leadframe Bodies to Form Openings Through Encapsulant for Vertical Interconnect of Semiconductor DieABANSep 10, 12Jan 03, 13[H01L]
2012/0273,937 Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer LayerABANApr 30, 11Nov 01, 12[H01L]
2011/0316,163 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MOLDED INTERCONNECTS AND METHOD OF MANUFACTURE THEREOFABANJun 24, 10Dec 29, 11[H01L]
2011/0306,168 INTEGRATED CIRCUIT PACKAGE SYSTEM FOR PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOFABANAug 24, 11Dec 15, 11[H01L]
2011/0291,264 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH POSTS AND METHOD OF MANUFACTURE THEREOFABANJun 01, 10Dec 01, 11[H01L]
2011/0108,966 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONCAVE TRENCHES AND METHOD OF MANUFACTURE THEREOFABANMar 23, 10May 12, 11[H01L]
2011/0024,890 Stackable Package By Using Internal Stacking ModulesABANSep 15, 10Feb 03, 11[H01L]
2010/0327,406 Semiconductor Device and Method of Forming Inductor Over Insulating Material Filled Trench In SubstrateABANJun 26, 09Dec 30, 10[H01L]
2010/0320,591 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONTACT PADS AND METHOD OF MANUFACTURE THEREOFABANJun 19, 09Dec 23, 10[H01L]
2010/0133,534 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER AND FLIP CHIP AND METHOD OF MANUFACTURE THEREOFABANDec 03, 08Jun 03, 10[H01L]
2010/0123,230 INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING BUMPED LEAD AND METHOD OF MANUFACTURE THEREOFABANNov 20, 08May 20, 10[H01L]
2010/0117,230 Flip Chip Interconnection Structure Having Void-Free Fine Pitch and Method ThereofABANJan 15, 10May 13, 10[H01L]
2010/0078,831 INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SINGULATION PROCESSABANSep 26, 08Apr 01, 10[H01L]
2009/0250,814 Flip Chip Interconnection Structure Having Void-Free Fine Pitch and Method ThereofABANApr 03, 08Oct 08, 09[H01L]
2009/0243,068 INTEGRATED CIRCUIT PACKAGE SYSTEM WITH NON-SYMMETRICAL SUPPORT STRUCTURESABANMar 26, 08Oct 01, 09[H01L]
2009/0233,436 Semiconductor Device Having High-Density Interconnect Array with Core Pillars Formed With OSP CoatingABANMar 12, 08Sep 17, 09[H01L]
2009/0191,029 SYSTEM FOR HANDLING SEMICONDUCTOR DIESABANJan 30, 08Jul 30, 09[H01L]
2009/0170,241 Semiconductor Device and Method of Forming the Device Using Sacrificial CarrierABANDec 26, 07Jul 02, 09[H01L]

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