STMICROELECTRONICS S.A.
Patent Owner
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- 6 1,903 total patents issued
- 1,812 Total Apps Published
- May 07, 2013 most recent publication
Details
- 1,903 Issued Patents
- 380 Issued in last 3 years
- 221 Published in last 3 years
- 6,579 Total Citation Count
- Dec 16, 1993 Earliest Filing
- 53 Expired/Abandoned/Withdrawn Patents
Technologies
Intl Class
Technology
# of Patents
Rank
Top Patents (by citation)
Patent #
Title
Filing Date
Issue Date
Intl Class
Cited #
6,480,013
Method for the calibration of an RF integrated circuit probe
Feb 07, 00
Nov 12, 02
[G01R]
99
6,087,202
Process for manufacturing semiconductor packages comprising an integrated circuit
Jun 03, 98
Jul 11, 00
[H01L]
48
6,495,403
Gate-all-around semiconductor device and process for fabricating the same
Oct 05, 00
Dec 17, 02
[H01L]
44
Recent Publications
Publication #
Title
Filing Date
Pub Date
Intl Class
2013/0105,664
IMAGE SENSOR WITH INDIVIDUALLY SELECTABLE IMAGING ELEMENTS
Apr 26, 12
May 02, 13
[H01L]
2013/0075,870
METHOD FOR PROTECTION OF A LAYER OF A VERTICAL STACK AND CORRESPONDING DEVICE
Sep 19, 12
Mar 28, 13
[H01L]
2013/0072,032
METHOD FOR DEPOSITING A SILICON OXIDE LAYER OF SAME THICKNESS ON SILICON AND ON SILICON-GERMANIUM
Jul 27, 12
Mar 21, 13
[H01L]
2013/0057,334
METHOD FOR PROVIDING A SYSTEM ON CHIP WITH POWER AND BODY BIAS VOLTAGES
Nov 05, 12
Mar 07, 13
[H03K]
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
8,436,652
Dual-edge register and the monitoring thereof on the basis of a clock
Jun 02, 11
May 07, 13
[H03K]
8,410,570
Photodiode with interfacial charge control and associated process
May 17, 10
Apr 02, 13
[H01L]
8,410,910
Passive contactless integrated circuit comprising a flag for monitoring an erase/programming voltage
Mar 06, 08
Apr 02, 13
[H04Q]
8,412,996
Method and device for checking the integrity of a logic signal, in particular a clock signal
Jan 28, 08
Apr 02, 13
[G01R, H04L, G11B, G06F, H03M, G06K]
Top Inventors for This Owner
Inventor Name
Address
Patent #