TOWER SEMICONDUCTOR LTD.
Patent Owner
Stats
- 105 US PATENTS IN FORCE
- 3 US APPLICATIONS PENDING
- Mar 13, 2018 most recent publication
Details
- 105 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 3,292 Total Citation Count
- Dec 19, 1996 Earliest Filing
- 13 Expired/Abandoned/Withdrawn Patents
Patent Activity in the Last 10 Years
Technologies
Intl Class
Technology
Matters
Rank in Class
Top Patents (by citation)
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Recent Publications
Publication #
Title
Filing Date
Pub Date
Intl Class
2017/0323,912 Image Sensor Pixel With Memory Node Having Buried Channel And Diode Portions Formed On N-Type SubstrateJul 24, 17Nov 09, 17[H01L, H04N]
2017/0221,941 BACKSIDE ILLUMINATED (BSI) CMOS IMAGE SENSOR (CIS) WITH A RESONANT CAVITY AND A METHOD FOR MANUFACTURING THE BSI CISJan 31, 16Aug 03, 17[H01L]
2015/0162,369 Single-Poly Floating Gate Solid State Direct Radiation Sensor Using STI Dielectric And Isolated PWellsDec 09, 13Jun 11, 15[H01L]
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
9885697 Semiconductor gas sensor using magnetic tunnel junction elementsDec 03, 15Feb 06, 18[H01L, G01N]
9865632 Image sensor pixel with memory node having buried channel and diode portions formed on N-type substrateJul 24, 17Jan 09, 18[H01L, H04N]
9865640 Backside illuminated (BSI) CMOS image sensor (CIS) with a resonant cavity and a method for manufacturing the BSI CISJan 31, 16Jan 09, 18[H01L]
9806174 Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate “bump” structureSep 01, 16Oct 31, 17[H01L]
9766136 Apparatus, system and method of detecting leakage in a chamberJun 09, 14Sep 19, 17[G01K, G01M, G05B]
Expired/Abandoned/Withdrawn Patents
Patent #
Title
Status
Filing Date
Issue/Pub Date
Intl Class
2015/0279,969 Double-Resurf LDMOS With Drift And PSURF Implants Self-Aligned To A Stacked Gate "BUMP" StructureAbandonedJun 15, 15Oct 01, 15[H01L]
2015/0108,618 COMPOSITION AND METHOD FOR FORMING A DIELECTRIC LAYERAbandonedMay 07, 13Apr 23, 15[C08J, H01L]
2013/0293,986 Current Limit Circuit Architecture For Low Drop-Out Voltage RegulatorsAbandonedMay 07, 12Nov 07, 13[H02H]
2010/0188,901 Three-Terminal Single Poly NMOS Non-Volatile Memory CellAbandonedMar 23, 10Jul 29, 10[H01L, G11C]
2010/0027,346 Asymmetric Single Poly NMOS Non-Volatile Memory CellAbandonedOct 20, 09Feb 04, 10[H01L, G11C]
2010/0027,347 Three-Terminal Single Poly NMOS Non-Volatile Memory CellAbandonedOct 20, 09Feb 04, 10[H01L, G11C]
2008/0110,759 Self Terminating Overburden Free Plating (STOP) Of Metals On Patterned WafersAbandonedNov 14, 06May 15, 08[C25D]
2007/0200,055 Via wave guide with cone-like light concentrator for image sensing devicesAbandonedFeb 24, 06Aug 30, 07[H01L]
2006/0094,257 Low thermal budget dielectric stack for SONOS nonvolatile memoriesAbandonedNov 03, 05May 04, 06[H01L]
2005/0003,659 Transparent inter-metal dielectric stack for CMOS image sensorsAbandonedJul 03, 03Jan 06, 05[H01L]
2001/0021,126 EEPROM array using 2 bit non-volatile memory cells and method of implementing sameAbandonedMay 10, 01Sep 13, 01[G11C]
Top Inventors for This Owner
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