TRANSWITCH CORPORATION
Patent Owner
Stats
- 17 US PATENTS IN FORCE
- 0 US APPLICATIONS PENDING
- Jul 29, 2010 most recent publication
Details
- 17 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 1,811 Total Citation Count
- Dec 09, 1988 Earliest Filing
- 37 Expired/Abandoned/Withdrawn Patents
Patent Activity in the Last 10 Years
Technologies
Intl Class
Technology
Matters
Rank in Class
Top Patents (by citation)
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Recent Publications
- No Recent Publications to Display
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
7714565 Methods and apparatus for testing delay locked loops and clock skewApr 01, 08May 11, 10[H03L, G01R]
7342885 Method and apparatus for implementing a backpressure mechanism in an asynchronous data transfer and source traffic control systemJan 15, 03Mar 11, 08[G06F]
7177600 Apparatus and method for testing performance of mobile station having GPS functionJun 24, 03Feb 13, 07[H04B]
6205155 Apparatus and method for limiting data bursts in ATM switch utilizing shared busMar 05, 99Mar 20, 01[H04J]
5548534 Two stage clock dejitter circuit for regenerating an E4 telecommunications signal from the data component of an STS-3C signalJul 08, 94Aug 20, 96[H04J]
5548833 Data independent automatic gain control circuit for telecommunication applicationsJun 03, 94Aug 20, 96[H04B, H03G]
5535218 Apparatus and method for limiting jitter in a telecommunications signal which is being mapped in another such signal by temporarily suspending measurement of available dataJul 18, 95Jul 09, 96[H04J]
5528598 Apparatus and method for limiting jitter in a telecommunications signalJun 03, 94Jun 18, 96[H04J]
Expired/Abandoned/Withdrawn Patents
Patent #
Title
Status
Filing Date
Issue/Pub Date
Intl Class
2010/0191,814 System-On-A-Chip Employing A Network Of Nodes That Utilize Receive Side Flow Control Over Channels For Messages Communicated TherebetweenAbandonedDec 16, 09Jul 29, 10[G06F]
2010/0191,911 System-On-A-Chip Having an Array of Programmable Processing Elements Linked By an On-Chip Network with Distributed On-Chip Shared Memory and External Shared MemoryAbandonedDec 16, 09Jul 29, 10[G06F]
2010/0158,005 System-On-a-Chip and Multi-Chip Systems Supporting Advanced Telecommunication FunctionsAbandonedDec 23, 08Jun 24, 10[H04L]
2010/0158,023 System-On-a-Chip and Multi-Chip Systems Supporting Advanced Telecommunication FunctionsAbandonedDec 23, 08Jun 24, 10[H04L]
2010/0161,938 System-On-A-Chip Supporting A Networked Array Of Configurable Symmetric Multiprocessing NodesAbandonedDec 23, 08Jun 24, 10[G06F]
2010/0162,265 System-On-A-Chip Employing A Network Of Nodes That Utilize Logical Channels And Logical Mux Channels For Communicating Messages TherebetweenAbandonedDec 23, 08Jun 24, 10[G06F]
2010/0095,188 APPARATUS AND METHOD FOR DETECTING AND CORRECTING ERRORS IN CONTROL CHARACTERS OF A MULTIMEDIA INTERFACEAbandonedOct 09, 08Apr 15, 10[H03M, G06F]
7653072 Overcoming access latency inefficiency in memories for packet switched networksExpiredNov 13, 02Jan 26, 10[H04L, G06F, G11C]
7577089 Methods and apparatus for fast ETHERNET link switchover in the event of a link failureExpiredMay 26, 06Aug 18, 09[H04J]
7433871 Efficient ipv4/ipv6 best matching prefix method and apparatusExpiredFeb 14, 03Oct 07, 08[G06F]
7430201 Methods and apparatus for accessing full bandwidth in an asynchronous data transfer and source traffic control systemExpiredMar 21, 03Sep 30, 08[H04L]
7401333 Array of parallel programmable processing engines and deterministic method of operating the sameExpiredAug 08, 01Jul 15, 08[G06F]
2008/0120,672 Methods and Apparatus for Weighted Multicasting of Data StreamsAbandonedNov 21, 06May 22, 08[H04N]
7355380 Methods and apparatus for testing delay locked loops and clock skewExpiredMay 19, 06Apr 08, 08[G01R]
2006/0039,400 Pause frame reconciliation in end-to-end and local flow control for ethernet over sonetAbandonedAug 23, 04Feb 23, 06[H04L]
2006/0039,411 SONET/SDH frame synchronization in the presence of high bit error ratesAbandonedAug 23, 04Feb 23, 06[H04J]
2005/0249,247 Methods and apparatus for multiplexing multiple signal sources over a single full duplex ETHERNET linkAbandonedMay 05, 04Nov 10, 05[H04J]
2005/0232,303 Efficient packet processing pipeline device and methodAbandonedOct 20, 04Oct 20, 05[H04J]
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