VeriSilicon Holdings, Co. Ltd.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
G06F ELECTRIC DIGITAL DATA PROCESSING 11436
 
  
 
H03K PULSE TECHNIQUE 1130
 
  
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 1110
 
  
 
H04R LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS 1106

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2017/0337,114 SYSTEM AND METHOD FOR COMMUNICATION BETWEEN A DEBUGGER AND A TARGET PROCESSORMay 20, 16Nov 23, 17[G06F]

Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9600279 Circuit and method for searching a data array and single-instruction, multiple-data processing unit incorporating the sameJul 26, 12Mar 21, 17[G06F]
9538285 Real-time microphone array with robust beamformer and postfilter for speech enhancement and method of operation thereofJun 22, 12Jan 03, 17[H04R, G06F]
9348590 Digital signal processor prefetch buffer and methodSep 06, 13May 24, 16[G06F]
8766675 Overvoltage protection circuitMar 15, 13Jul 01, 14[H03K, H02H]
8516605 Electronic device and software interlocking security systemAug 08, 07Aug 20, 13[G06F]
8095781 Instruction fetch pipeline for superscalar digital signal processors and method of operation thereofSep 04, 08Jan 10, 12[G06F]
7434036 System and method for executing software program instructions using a condition specified within a conditional execution instructionAug 30, 02Oct 07, 08[G06F]
7426710 Standard cell library having cell drive strengths selected according to delayNov 15, 05Sep 16, 08[G06F]
7254802 Standard cell library having cell drive strengths selected according to delayMay 27, 04Aug 07, 07[G06F]
7185294 Standard cell library having globally scalable transistor channel lengthSep 23, 04Feb 27, 07[G06F]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2014/0032,626 MULTIPLY ACCUMULATE UNIT ARCHITECTURE OPTIMIZED FOR BOTH REAL AND COMPLEX MULTIPLICATION OPERATIONS AND SINGLE INSTRUCTION, MULTIPLE DATA PROCESSING UNIT INCORPORATING THE SAMEAbandonedJul 26, 12Jan 30, 14[G06F]
2013/0343,549 MICROPHONE ARRAYS FOR GENERATING STEREO AND SURROUND CHANNELS, METHOD OF OPERATION THEREOF AND MODULE INCORPORATING THE SAMEAbandonedJul 01, 13Dec 26, 13[H04R]
2013/0159,665 SPECIALIZED VECTOR INSTRUCTION AND DATAPATH FOR MATRIX MULTIPLICATIONAbandonedDec 15, 11Jun 20, 13[G06F]
2008/0313,433 PROCESSOR FOR SIMULTANEOUSLY EXECUTING MULTIPLE CONDITIONAL EXECUTION INSTRUCTION GROUPSAbandonedAug 21, 08Dec 18, 08[G06F]
2005/0278,659 Cell library providing transistor size information for automatic circuit designAbandonedMay 27, 04Dec 15, 05[G06F]

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