X-FAB SEMICONDUCTOR FOUNDRIES AG
Patent Owner
Stats
- 81 US PATENTS IN FORCE
- 5 US APPLICATIONS PENDING
- Mar 08, 2018 most recent publication
Details
- 81 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 691 Total Citation Count
- Jul 14, 2000 Earliest Filing
- 40 Expired/Abandoned/Withdrawn Patents
Patent Activity in the Last 10 Years
Technologies
Intl Class
Technology
Matters
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Top Patents (by citation)
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Recent Publications
Publication #
Title
Filing Date
Pub Date
Intl Class
2018/0068,872 Carrier Substrate For Semiconductor Structures Suitable For A Transfer By Transfer Print And Manufacturing Of The Semiconductor Structures On The Carrier SubstrateJul 13, 17Mar 08, 18[H01L]
2017/0271,397 Anti-Reflective Treatment Of The Rear Side Of A Semiconductor WaferAug 08, 14Sep 21, 17[H01L]
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
Expired/Abandoned/Withdrawn Patents
Patent #
Title
Status
Filing Date
Issue/Pub Date
Intl Class
2016/0126,350 LDMOS TRANSISTORS FOR CMOS TECHNOLOGIES AND AN ASSOCIATED PRODUCTION METHODAbandonedDec 16, 15May 05, 16[H01L]
2011/0182,324 OPERATING TEMPERATURE MEASUREMENT FOR AN MOS POWER COMPONENT, AND MOS COMPONENT FOR CARRYING OUT THE METHODAbandonedMay 19, 09Jul 28, 11[G01K, H01L]
2011/0012,236 EVALUATION OF AN UNDERCUT OF DEEP TRENCH STRUCTURES IN SOI WAFERSAbandonedJan 19, 07Jan 20, 11[H01L]
2010/0330,506 METHOD FOR TRANSFERRING AN EPITAXIAL LAYER FROM A DONOR WAFER TO A SYSTEM WAFER APPERTAINING TO MICROSYSTEMS TECHNOLOGYAbandonedJul 18, 08Dec 30, 10[G03F]
2010/0311,248 STRUCTURED LAYER DEPOSITION ON PROCESSED WAFERS USED IN MICROSYSTEM TECHNOLOGYAbandonedJun 16, 08Dec 09, 10[H01L, B05C]
2010/0282,165 PRODUCTION OF ADJUSTMENT STRUCTURES FOR A STRUCTURED LAYER DEPOSITION ON A MICROSYSTEM TECHNOLOGY WAFERAbandonedJun 16, 08Nov 11, 10[C23C, C23F]
2010/0252,880 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE, AND A SEMICONDUCTOR DEVICEAbandonedJul 18, 08Oct 07, 10[H01L]
7790569 Production of semiconductor substrates with buried layers by joining (bonding) semiconductor wafersExpiredNov 29, 04Sep 07, 10[H01L]
2010/0213,545 MOS TRANSISTOR WITH A P-FIELD IMPLANT OVERLYING EACH END OF A GATE THEREOFAbandonedMay 15, 08Aug 26, 10[H01L]
2010/0155,910 METHOD FOR THE SELECTIVE ANTIREFLECTION COATING OF A SEMICONDUCTOR INTERFACE BY A PARTICULAR PROCESS IMPLEMENTATIONAbandonedJun 16, 07Jun 24, 10[H01L]
2010/0148,255 LATERAL HIGH-VOLTAGE MOS TRANSISTOR WITH A RESURF STRUCTUREAbandonedMar 26, 08Jun 17, 10[H01L]
2010/0059,851 CMOS CIRCUITS COMBINING HIGH VOLTAGE AND RF TECHNOLOGIESAbandonedJun 27, 07Mar 11, 10[H01L]
2009/0294,893 ISOLATION TRENCH INTERSECTION STRUCTURE WITH REDUCED GAP WIDTHAbandonedDec 08, 06Dec 03, 09[H01L]
2009/0250,724 BIPOLAR TRANSISTOR AND METHOD OF MAKING SUCH A TRANSISTORAbandonedDec 14, 05Oct 08, 09[H01L]
7598098 Monitoring the reduction in thickness as material is removed from a wafer composite and test structure for monitoring removal of materialExpiredApr 16, 04Oct 06, 09[H01L]
2009/0180,188 BROADBAND ANTIREFLECTIVE OPTICAL COMPONENTS WITH CURVED SURFACES AND THEIR PRODUCTIONAbandonedMar 23, 07Jul 16, 09[G02B]
2009/0174,418 Method and Device for Electrically Determining the Thickness of Semiconductor Membranes by Means of an Energy InputAbandonedOct 20, 05Jul 09, 09[G01R]
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