Frequency division circuit, method of controlling frequency division circuit, and analog electronic timepiece
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United States of America Patent
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Jan 15, 2019
Grant Date -
Nov 24, 2016
app pub date -
Mar 17, 2016
filing date -
May 18, 2015
priority date (Note) -
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Abstract
A frequency division circuit includes a first frequency division circuit which divides a frequency of a reference signal that is generated by an oscillation circuit. An input/output terminal outputs an output signal of the first frequency division circuit for testing. A selection circuit outputs as an intermediate signal one of a first intermediate signal which is input from the input/output output terminal, and a second intermediate signal which is an output signal of the first frequency division circuit. A second frequency division circuit divides a frequency of the intermediate signal output from the selection circuit. A switching time count circuit begins counting a predetermined amount of time after the second frequency division circuit starts frequency-dividing the intermediate signal and, after elapse of the predetermined amount of time, switches the intermediate signal output from the selection circuit from the first intermediate signal to the second intermediate signal.
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