Package-on-package structure and method
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United States of America Patent
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Jun 18, 2019
Grant Date -
Mar 8, 2018
app pub date -
Nov 10, 2017
filing date -
Jun 16, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
A method includes attaching a first semiconductor package on a carrier, wherein the first semiconductor package comprises a plurality of stacked semiconductor dies and a plurality of contact pads, depositing a first molding compound layer over the carrier, wherein the first semiconductor package is embedded in the first molding compound layer, forming a plurality of vias over the plurality of contact pads, attaching a semiconductor die on the first molding compound layer, depositing a second molding compound layer over the carrier, wherein the semiconductor die and the plurality of vias are embedded in the second molding compound layer, forming an interconnect structure over the second molding compound layer and forming a plurality of bumps over the interconnect structure.
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