Circuits for amplitude demodulation and related methods
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United States of America Patent
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Nov 26, 2019
Grant Date -
Jul 12, 2018
app pub date -
Oct 6, 2017
filing date -
Jan 11, 2017
priority date (Note) -
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Abstract
A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK). The demodulator may comprise a clock extractor configured to generate a clock signal in response to receiving an amplitude-modulated input signal, a phase shifter configured to generate a sampling signal by phase-shifting the clock signal by approximately π/2, and a sampler configured to sample the input signal in correspondence to one or more edges (such as one or more falling edges) of the sampling signal. In this way, the amplitude-modulated input signal may be sampled at its peak, or at least near its peak, thus ensuring high signal fidelity.
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