Interconnection for memory electrodes

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 10600452
APP PUB NO 20190013052A1
SERIAL NO

16030584

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Abstract

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Row and/or column electrode lines for a memory device are staggered such that gaps are formed between terminated lines. Vertical interconnection to central points along adjacent lines that are not terminated are made in the gap, and vertical interconnection through can additionally be made through the gap without contacting the lines of that level.

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Patent Owner(s)

  • MICRON TECHNOLOGY INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Castro, Hernan A Shingle Springs, US 120 1188
Flores, Everardo Torres Folsom, US 19 248
Tang, Stephen H S Fremont, US 7 64

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