Interposer, Test Access Port, First and Second Through Silicon Vias

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United States of America Patent

PATENT NO 10928419
APP PUB NO 20200150149A1
SERIAL NO

16747055

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Abstract

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The disclosure describes a novel method and apparatus for improving silicon interposers to include test circuitry for testing stacked die mounted on the interposer. The improvement allows for the stacked die to be selectively tested by an external tester or by the test circuitry included in the interposer.

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TEXAS INSTRUMENTS INCORPORATEDNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Whetsel, Lee D Parker, US 880 5890

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