Under-bump-metallization structure and redistribution layer design for integrated fan-out package with integrated passive device

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United States of America Patent

PATENT NO 11631658
APP PUB NO 20210074694A1
SERIAL NO

17099179

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Abstract

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A semiconductor package includes an integrated passive device (IPD) including one or more passive devices over a first substrate; and metallization layers over and electrically coupled to the one or more passive devices, where a topmost metallization layer of the metallization layers includes a first plurality of conductive patterns; and a second plurality of conductive patterns interleaved with the first plurality of conductive patterns. The IPD also includes a first under bump metallization (UBM) structure over the topmost metallization layer, where the first UBM structure includes a first plurality of conductive strips, each of the first plurality of conductive strips electrically coupled to a respective one of the first plurality of conductive patterns; and a second plurality of conductive strips interleaved with the first plurality of conductive strips, each of the second plurality of conductive strips electrically coupled to a respective one of the second plurality of conductive patterns.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Huang, Yu-Chih Hsinchu, TW 93 475
Kuo, Ting-Ting Hsinchu, TW 34 114
Lai, Chi-Hui Taichung, TW 42 124
Liu, Chiahung Hsinchu, TW 15 41
Liu, Chung-Shi Hsinchu, TW 824 11367
Tai, Chih-Hsuan Taipei, TW 58 189
Tsai, Hao-Yi Hsinchu, TW 489 3426
Tseng, Ying-Cheng Tainan, TW 37 92
Wang, Chuei-Tang Taichung, TW 274 2033
Wu, Ban-Li Hsinchu, TW 24 68
Yu, Chen-Hua Hsinchu, TW 2207 47923

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