Methods of forming interconnect circuits

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 11979976
APP PUB NO 20210352798A1
SERIAL NO

17383129

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Abstract

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Provided are interconnect circuits and methods of forming thereof. A method may involve laminating a substrate to a conductive layer followed by patterning the conductive layer. This patterning operation forms individual conductive portions, which may be also referred to as traces or conductive islands. The substrate supports these portions relative to each other during and after patterning. After patterning, an insulator may be laminated to the exposed surface of the patterned conductive layer. At this point, the conductive layer portions are also supported by the insulator, and the substrate may optionally be removed, e.g., together with undesirable portions of the conductive layer. Alternatively, the substrate may be retained as a component of the circuit and the undesirable portions of the patterned conductive layer may be removed separately. These approaches allow using new patterning techniques as well as new materials for substrates and/or insulators.

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Patent Owner(s)

Patent OwnerAddress
CELLINK CORPORATION610 QUARRY RD SAN CARLOS CA 94070

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Brown, Malcolm Parker Mountain View, US 21 87
Coakley, Kevin Michael Belmont, US 52 640
Lego, Paul Henry Woodside, US 4 14
Miller, Michael Lawrence San Mateo, US 4 14
Yang, Dongao Redwood City, US 7 43

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