Microelectronic assembly from processed substrate

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United States of America Patent

PATENT NO 12051621
APP PUB NO 20220285213A1
SERIAL NO

17825405

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Abstract

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Representative implementations of techniques, methods, and formulary provide repairs to processed semiconductor substrates, and associated devices, due to erosion or “dishing” of a surface of the substrates. The substrate surface is etched until a preselected portion of one or more embedded interconnect devices protrudes above the surface of the substrate. The interconnect devices are wet etched with a selective etchant, according to a formulary, for a preselected period of time or until the interconnect devices have a preselected height relative to the surface of the substrate. The formulary includes one or more oxidizing agents, one or more organic acids, and glycerol, where the one or more oxidizing agents and the one or more organic acids are each less than 2% of formulary and the glycerol is less than 10% of the formulary.

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Patent Owner(s)

Patent OwnerAddress
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC3025 ORCHARD PARKWAY SAN JOSE CA 95134

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mirkarimi, Laura Wills Sunol, US 91 3881
Uzoh, Cyprian Emeka San Jose, US 382 12692

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