Linear prediction to suppress spurs in a digital phase-locked loop

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United States of America

PATENT NO 12191866
APP PUB NO 20230094645A1
SERIAL NO

17902817

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Abstract

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A technique uses linear prediction to determine the location of spurious content in a digital phase-locked loop and suppresses the spurious content from propagating to the clock output. In at least one embodiment, the technique implements an iterative (e.g., recursive) computation.

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Inventor Name Address # of filed Patents Total Citations
Jayakumar, Kannanthodath V Austin, US 7 24

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