Clock gating circuit for dual-edge-triggered flip-flops

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12224752
APP PUB NO 20250030407A1
SERIAL NO

18354374

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Abstract

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An apparatus, including: a clock gating circuit (CGC), including: a clock gating device configured to selectively gate/pass a selected clock signal based on an enable signal to generate an output clock signal; and a clock selection circuit configured to select a non-complementary clock signal or a complementary clock signal to generate the selected clock signal based on the output clock signal and the non-complementary clock signal or the complementary clock signal.

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Patent Owner(s)

Patent OwnerAddress
QUALCOMM INCORPORATED5775 MOREHOUSE DRIVE SAN DIEGO CA 92121-1714

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bowman, Keith Alan Morrisville, US 34 228
Peng, Yimai Cary, US 2 1
Vachon, Robert Joseph Zebulon, US 1 0
Yingling, Daniel Apex, US 8 18

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