Method for fabricating semiconductor device with damascene structure

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12230535
APP PUB NO 20230307288A1
SERIAL NO

17701938

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present application discloses a method for fabricating a semiconductor device including: providing a photomask including an opaque layer on a mask substrate and surrounding a translucent layer on the mask substrate; forming a pre-process mask layer on a device stack; patterning the pre-process mask layer using the photomask to form a patterned mask layer including a mask region corresponding to the opaque layer, a trench region corresponding to the translucent layer, and a via hole corresponding to the mask opening of via feature; performing a damascene etching process to form a via opening and a trench opening in the device stack; and forming a via in the via opening and a trench in the trench opening. The translucent layer includes a mask opening of via feature which exposes a portion of the mask substrate. A thickness of the trench region is less than a thickness of the mask region.

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Patent Owner(s)

  • NANYA TECHNOLOGY CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Pan, Wei-Chen New Taipei, TW 12 3

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