Sense amplifier circuit architecture

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12254921
APP PUB NO 20230162782A1
SERIAL NO

18151466

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Abstract

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A sense amplifier circuit architecture includes a first NMOS layout, a second NMOS layout, a first PMOS layout, a second PMOS layout, a first processing structure layout and a second processing structure layout. The first NMOS layout includes first N-type active layers and first gate layers discretely arranged on the first N-type active layers. The second NMOS layout includes second N-type active layers and second gate layers discretely arranged on the second N-type active layers. The first PMOS layout includes first P-type active layers and third gate layers discretely arranged on the first P-type active layers. The second PMOS layout includes second P-type active layers and fourth gate layers discretely arranged on the second P-type active layers. The first processing structure layout includes first active layers and a first isolation gate. The second processing structure layout includes second active layers and a second isolation gate.

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Patent Owner(s)

Patent OwnerAddress
CHANGXIN MEMORY TECHNOLOGIES INCHEFEI CITY ANHUI PROVINCE 230601

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chi, Sungsoo Hefei, CN 23 22
Yang, Guifen Hefei, CN 10 7

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