Data transfer controller, microcomputer and data processing system

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6496934
APP PUB NO 20010000084A1
SERIAL NO

09727453

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A combination mode a data transfer for a transfer source and a transfer destination is previously defined by a value of resource select information of a control register (CHCRn). An address comparator circuit (SACn, DACn) has judging logic specified by the defined contents and detects, depending on its logical structure, a data transfer address error in the a data transfer controller (8) on the basis of such logical structure, in accordance with resource select information and the transfer source address and transfer destination address of the address registers (SARn, DARn). Since the data transfer is started only when the resource select information matches with the setting information of both address registers, high reliability can be assured for memory protection in the data transfer operation by the data transfer controller.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
RENESAS ELECTRONICS CORPORATIONTOKYO11993

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nakagawa, Norio Tokyo, JP 34 448
Suzuki, Takaaki Higashimurayama, JP 143 1377
Takasuga, Tomoya Kodaira, JP 5 26

Cited Art Landscape

Patent Info (Count) # Cites Year
 
UMB INTERNATIONAL, LLC (1)
6266648 Benefits tracking and correlation system for use with third-party enabling organizations 75 1998
 
SOCIONEXT INC. (1)
6108235 Memory device 13 1998
 
INTEL CORPORATION (1)
5546561 Circuitry and method for selectively protecting the integrity of data stored within a range of addresses within a non-volatile semiconductor memory 29 1995
 
RENESAS ELECTRONICS CORPORATION (2)
6101586 Memory access control circuit 30 1998
* 6202154 Data transfer controller, microcomputer and data processing system 7 1998
 
SAMSUNG ELECTRONICS CO., LTD. (1)
5857114 DMA system for re-arbitrating memory access priority during DMA transmission when an additional request is received 35 1996
 
KABUSHIKI KAISHA TOSHIBA (1)
5379394 Microprocessor with two groups of internal buses 42 1990
 
NORTH STAR INNOVATIONS INC. (1)
6049876 Data processing system and method which detect unauthorized memory accesses 17 1998
 
Gemplus Card International (1)
5963980 Microprocessor-based memory card that limits memory accesses by application programs and method of operation 68 1996
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
CALLAHAN CELLULAR L.L.C. (1)
* 6832257 Computer, recorded medium on which address validity checking program is recorded, and address validity checking method 11 2000
 
TEXAS INSTRUMENTS INCORPORATED (2)
* 9740887 Methods and systems to restrict usage of a DMA channel 0 2006
* 2007/0174,507 Methods and Systems to Restrict Usage of a DMA Channel 3 2006
 
KABUSHIKI KAISHA TOSHIBA (2)
* 7219369 Internal memory type tamper resistant microprocessor with secret protection function 14 2003
* 2003/0182,571 Internal memory type tamper resistant microprocessor with secret protection function 7 2003
 
GOOGLE TECHNOLOGY HOLDINGS LLC (2)
* 7003553 Storage control system with channel control device having data storage memory and transfer destination circuit which transfers data for accessing target cache area without passing through data storage memory 5 2004
* 2005/0223,166 Storage control system, channel control device for storage control system, and data transfer device 1 2004
 
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (2)
* 7000045 Byte-enabled transfer for a data bus having fixed-byte data transfer 10 2002
* 2004/0044,812 Byte-enabled transfer for a data bus having fixed-byte data transfer 3 2002
* Cited By Examiner