Semiconductor device

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United States of America Patent

PATENT NO 6373668
SERIAL NO

09729724

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Abstract

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A semiconductor device of SOI structure with improved ESD resistance is provided. In an I/O protection circuit of a semiconductor device of SOI structure, each unit channel width resistance value of drain resistance of a plurality of NMOS transistors, each being provided in parallel to an external terminal by a reverse bias connection, is set to have an HBM surge resistance voltage equal to that in a forward bias connection.

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Patent Owner(s)

  • MITSUBISHI DENKI KABUSHIKI KAISHA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yamaguchi, Yasuo Tokyo, JP 192 3094

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