Method for wafer polishing and method for polishing-pad dressing

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6428398
SERIAL NO

09737738

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

It is arranged such that the least common multiple of two numbers m and n of which one is prime to the other, is made as large as possible where the number m is the rotational speed (rpm) of a platen with a polishing pad affixed thereto and the number n is the rotational speed (rpm) of a carrier with a wafer mounted thereon. As a result of such arrangement, it is not until the platen completes m revolutions that a point on the polishing pad that comes into contact with a fixed point on the wafer returns to the original contact point with the fixed point at the start of polishing, and the resulting trajectory is therefore spread uniformly over the polishing pad. Each point on the wafer is brought into contact with most surface regions of the polishing pad, therefore preventing the wafer from undergoing deterioration in planarity uniformity due to a particular point on the wafer, on one hand, frequently coming into contact with low polishing-rate regions in the polishing pad and due to the other points on the wafer, on the other hand, less frequently coming into contact with the regions.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • PANNOVA SEMIC, LLC

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hashimoto, Shin Osaka, JP 58 998
Hidaka, Yoshiharu Toyama, JP 24 267

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation