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Abstract

An apparatus and method for power management of embedded electronic subsystems. A power management control circuit for managing power to an embedded subsystem includes a subsystem power node connected to a first section of the embedded electronic subsystem and a bias voltage node connected to a second section of the embedded electronic subsystem. A power switch is connected between a power supply and the subsystem power node. By separating the power subsystem node from the bias voltage node, power can be removed from the subsystem, while still providing the necessary bias voltage to the electronic static discharge (ESD) diodes. This prevents the voltages applied to the system bus by the subsystem from causing bus contention or system bus lock-ups. A power removal and restoration procedure is also disclosed.

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First Claim