External storage device and memory access control method thereof
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United States of America Patent
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Mar 2, 2004
Grant Date -
May 17, 2001
app pub date -
Jan 2, 2001
filing date -
Jul 14, 1995
priority date (Note) -
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Abstract
High-speed memory access and transparent error detection and correction using a single error correcting means are obtained and processed by an external storage device of a host computer when sector data having an arbitrary byte width are accessed continuously according to a size of a sector unit. Consequently, the host computer always reads sector data, and at the same time, error detection and the error correction for a next sector data are simultaneously performed, thereby greatly reducing the time required for error detection and error correction, and high speed memory access can be obtained.
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