Fill pattern in kerf areas to prevent localized non-uniformities of insulating layers at die corners on semiconductor substrates

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United States of America Patent

SERIAL NO

09764242

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Abstract

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A method for making a planar spin-on-glass (SOG) layer over integrated circuits at the corners of the chip (die) areas is achieved. This method allows more reliable integrated circuits to be made, and is particularly useful for liquid crystal displays (LCDs) by eliminating optical distortion at the corners of the LCD die areas. When a conducting layer is patterned to form portions of the integrated circuits over the chip areas, the layer is concurrently patterned to form a fill layer in the kerf areas. The spacing between the fill layer in the kerf areas and the edges of the patterned conducting layer in the die areas is selected to have a width sufficiently narrow to provide a uniform coating of SOG over the corners of the die areas without buildup of the SOG. After depositing a thin SiO.sub.x cap layer, a uniform SOG layer is deposited. The fill layer in the kerf areas also prevents dishing of the SOG layer when the SOG is chem-mech polished back. The process steps of this invention can be repeated to provide multilevels of electrical interconnections as required to complete the integrated circuits without causing non-uniformity of the SOG at the die corners.

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Patent OwnerAddress
CHARTERED SEMICONDUCTOR MANUFACTURING LTDNot Provided

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Inventor Name Address # of filed Patents Total Citations
Wong, George Singapore, SG 20 386

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