Power efficient line driver
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United States of America Patent
Stats
-
Aug 28, 2001
Issued Date -
N/A
app pub date -
Jan 24, 2001
filing date -
Mar 9, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A signal processing circuit is described including a frequency selective network in a feedback loop. An analog-to-analog converter in the feedback loop is coupled to the frequency selective network. A continuous-time feedback path provides feedback from the output terminal of the analog-to-analog converter to the frequency selective network.
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