PROCESS OF FINAL PASSIVATION OF AN INTEGRATED CIRCUIT DEVICE

United States of America Patent

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Issued Date
May 24, 2001
app pub date
Apr 14, 1998
filing date
Apr 15, 1997

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Abandoned

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Abstract

A process for forming a final passivation layer over an integrated circuit comprises a step of forming, over a surface of the integrated circuit, a protective film by means of High-Density Plasma Chemical Vapor Deposition.

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Patent Owner(s)

Patent Owner	Address
SGS-THOMSON MICROELECTRONICS S R L	AGRATE BRIANZA

International Classification(s)

H01L:SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICE....

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[Patents Count]

Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
DE, SANTI GIORGIO	MILANO, IT	9	101
ZANOTTI, LUCA	AGRATE BRIANZA, IT	15	192

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PROCESS OF FINAL PASSIVATION OF AN INTEGRATED CIRCUIT DEVICE

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United States of America Patent

09060192

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