Electro-optical device, clock signal adjusting method and circuit therefor, producing method therefor, and electronic equipment
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United States of America Patent
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Aug 31, 2004
Grant Date -
Jun 14, 2001
app pub date -
Dec 8, 2000
filing date -
Dec 9, 1999
priority date (Note) -
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status (Latency Note)
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Abstract
The invention prevents shift register circuits from malfunctioning. A distribution circuit outputs a trailing trigger pulse DTP and a leading trigger pulse UTP. A trailing edge control circuit and a leading edge control circuit delay the trailing trigger pulse DTP and the leading trigger pulse UTP, respectively. The delay time of each of these control circuits can be set. These delay times are determined according to a threshold voltage of a TFT constituting a shift register. An inverted clock signal CLYINV is generated according to output signals of the control circuits. The shift register is driven by a clock signal CLY and an inverted clock signal CLYINV.
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