Techniques for programming programmable logic array devices
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United States of America Patent
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May 7, 2002
Grant Date -
Jun 14, 2001
app pub date -
Jan 12, 2001
filing date -
Jun 5, 1996
priority date (Note) -
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Abstract
Programmable logic array devices are programmed from programming devices in networks that facilitate programming any number of such logic devices with programs of any size or complexity. The source of programming data and control may be a microprocessor or one or more serial EPROMs, one EPROM being equipped with a clock circuit. Several parallel data streams may be used to speed up the programming operation. A clock circuit with a programmably variable speed may be provided to facilitate programming logic devices with different speed characteristics. The programming protocol may include an acknowledgment from the logic device(s) to the programming data source after each programming data transmission so that the source can automatically transmit programming data at the speed at which the logic device is able to accept that data.
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