Method of thinning a semiconductor substrate using a perforated support substrate

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6492195
APP PUB NO 20010005043A1
SERIAL NO

09734927

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Abstract

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Disclosed herein is a technique which performs the thinning of a wafer and the separation thereof from a support substrate with high yields and in a short time. Described specifically, a hole-free support substrate is bonded to a second surface of a support substrate having holes with an adhesive layer melted by heating so as to bloc the holes. A wafer is bonded to a first surface of the support substrate having the holes with an adhesive layer melted by solvent. The wafer is thinned by grinding and etching. The adhesive layer is melted by heating and the support substrate having the holes is slid with respect to the hole-free support substrate to thereby separate the support substrate having the holes from the hole-free support substrate. Further, the adhesive layer is melted by solvent from the holes defined in the support substrate having the holes to thereby separate the wafer from the support substrate having the holes. Since the separation of the hole-free support substrate from the support substrate having the holes depends on heating and sliding, it can be carried out in a short time. Since the adhesive layer is melted by solvent which enters through the holes, the separation of the wafer in a short time is allowed. Both work do not put a load on the wafer and hence damage is prevented from occurring.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTDTOKYO
HITACHI TOHBU SEMICONDUCTOR LTD1-1 NISHIYOKOTEMACHI TAKASAKI-SHI GUNMA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukushima, Kikuo Ome, JP 1 78
Nakanishi, Masaki Saku, JP 21 298
Sorimachi, Susumu Komoro, JP 9 122
Yamada, Hiroji Shiroyama, JP 7 396
Yamashita, Kiichi Shiroyama, JP 49 922

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